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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
146 lines
4.8 KiB
Diff
146 lines
4.8 KiB
Diff
From 0e096c4f431ccd7f73e9baa930821dd3bbe93e35 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.com>
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Date: Tue, 25 Jan 2022 17:28:18 +0000
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Subject: [PATCH] drm/vc4: Support zpos on all planes
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Adds the zpos property to all planes, and creates the dlist
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by placing the fragments in the correct order based on zpos.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.com>
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---
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drivers/gpu/drm/vc4/vc4_hvs.c | 43 +++++++++++++++++++++------------
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drivers/gpu/drm/vc4/vc4_kms.c | 3 +--
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drivers/gpu/drm/vc4/vc4_plane.c | 22 ++++++++++++++---
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3 files changed, 48 insertions(+), 20 deletions(-)
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--- a/drivers/gpu/drm/vc4/vc4_hvs.c
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+++ b/drivers/gpu/drm/vc4/vc4_hvs.c
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@@ -854,6 +854,8 @@ void vc4_hvs_atomic_flush(struct drm_crt
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bool debug_dump_regs = false;
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bool enable_bg_fill = false;
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u32 __iomem *dlist_start, *dlist_next;
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+ unsigned int zpos = 0;
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+ bool found = false;
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if (vc4_state->assigned_channel == VC4_HVS_CHANNEL_DISABLED)
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return;
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@@ -867,23 +869,34 @@ void vc4_hvs_atomic_flush(struct drm_crt
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dlist_next = dlist_start;
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/* Copy all the active planes' dlist contents to the hardware dlist. */
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- drm_atomic_crtc_for_each_plane(plane, crtc) {
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- /* Is this the first active plane? */
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- if (dlist_next == dlist_start) {
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- /* We need to enable background fill when a plane
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- * could be alpha blending from the background, i.e.
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- * where no other plane is underneath. It suffices to
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- * consider the first active plane here since we set
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- * needs_bg_fill such that either the first plane
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- * already needs it or all planes on top blend from
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- * the first or a lower plane.
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- */
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- vc4_plane_state = to_vc4_plane_state(plane->state);
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- enable_bg_fill = vc4_plane_state->needs_bg_fill;
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+ do {
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+ found = false;
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+
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+ drm_atomic_crtc_for_each_plane(plane, crtc) {
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+ if (plane->state->normalized_zpos != zpos)
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+ continue;
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+
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+ /* Is this the first active plane? */
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+ if (dlist_next == dlist_start) {
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+ /* We need to enable background fill when a plane
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+ * could be alpha blending from the background, i.e.
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+ * where no other plane is underneath. It suffices to
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+ * consider the first active plane here since we set
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+ * needs_bg_fill such that either the first plane
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+ * already needs it or all planes on top blend from
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+ * the first or a lower plane.
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+ */
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+ vc4_plane_state = to_vc4_plane_state(plane->state);
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+ enable_bg_fill = vc4_plane_state->needs_bg_fill;
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+ }
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+
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+ dlist_next += vc4_plane_write_dlist(plane, dlist_next);
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+
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+ found = true;
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}
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- dlist_next += vc4_plane_write_dlist(plane, dlist_next);
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- }
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+ zpos++;
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+ } while (found);
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writel(SCALER_CTL0_END, dlist_next);
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dlist_next++;
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--- a/drivers/gpu/drm/vc4/vc4_kms.c
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+++ b/drivers/gpu/drm/vc4/vc4_kms.c
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@@ -1042,8 +1042,7 @@ int vc4_kms_load(struct drm_device *dev)
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dev->mode_config.helper_private = &vc4_mode_config_helpers;
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dev->mode_config.preferred_depth = 24;
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dev->mode_config.async_page_flip = true;
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- if (vc4->firmware_kms)
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- dev->mode_config.normalize_zpos = true;
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+ dev->mode_config.normalize_zpos = true;
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ret = vc4_ctm_obj_init(vc4);
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if (ret)
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--- a/drivers/gpu/drm/vc4/vc4_plane.c
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+++ b/drivers/gpu/drm/vc4/vc4_plane.c
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@@ -1572,9 +1572,14 @@ struct drm_plane *vc4_plane_init(struct
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DRM_COLOR_YCBCR_BT709,
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DRM_COLOR_YCBCR_LIMITED_RANGE);
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+ if (type == DRM_PLANE_TYPE_PRIMARY)
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+ drm_plane_create_zpos_immutable_property(plane, 0);
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+
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return plane;
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}
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+#define VC4_NUM_OVERLAY_PLANES 16
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+
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int vc4_plane_create_additional_planes(struct drm_device *drm)
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{
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struct drm_plane *cursor_plane;
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@@ -1590,7 +1595,7 @@ int vc4_plane_create_additional_planes(s
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* modest number of planes to expose, that should hopefully
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* still cover any sane usecase.
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*/
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- for (i = 0; i < 16; i++) {
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+ for (i = 0; i < VC4_NUM_OVERLAY_PLANES; i++) {
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struct drm_plane *plane =
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vc4_plane_init(drm, DRM_PLANE_TYPE_OVERLAY);
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@@ -1599,17 +1604,28 @@ int vc4_plane_create_additional_planes(s
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plane->possible_crtcs =
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GENMASK(drm->mode_config.num_crtc - 1, 0);
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+
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+ /* Create zpos property. Max of all the overlays + 1 primary +
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+ * 1 cursor plane on a crtc.
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+ */
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+ drm_plane_create_zpos_property(plane, i + 1, 1,
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+ VC4_NUM_OVERLAY_PLANES + 1);
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}
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drm_for_each_crtc(crtc, drm) {
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/* Set up the legacy cursor after overlay initialization,
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- * since we overlay planes on the CRTC in the order they were
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- * initialized.
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+ * since the zpos fallback is that planes are rendered by plane
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+ * ID order, and that then puts the cursor on top.
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*/
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cursor_plane = vc4_plane_init(drm, DRM_PLANE_TYPE_CURSOR);
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if (!IS_ERR(cursor_plane)) {
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cursor_plane->possible_crtcs = drm_crtc_mask(crtc);
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crtc->cursor = cursor_plane;
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+
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+ drm_plane_create_zpos_property(cursor_plane,
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+ VC4_NUM_OVERLAY_PLANES + 1,
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+ 1,
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+ VC4_NUM_OVERLAY_PLANES + 1);
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}
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}
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