mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 00:11:13 +00:00
a1383655cf
Tested on bcm2710 (Raspberry Pi 3B). Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
1930 lines
42 KiB
Diff
1930 lines
42 KiB
Diff
From e90536d721612de6a2619ae6727ee12b56bb2660 Mon Sep 17 00:00:00 2001
|
|
From: Phil Elwell <phil@raspberrypi.com>
|
|
Date: Thu, 30 Jan 2020 11:39:39 +0000
|
|
Subject: [PATCH] ARM: dts: Revert all changes to upstream dts files
|
|
|
|
With the possible exception of bcm2711* files where there is a name
|
|
clash, we should not be modifying upstream DTS files.
|
|
|
|
Signed-off-by: Phil Elwell <phil@raspberrypi.com>
|
|
---
|
|
arch/arm/boot/dts/bcm2711-rpi-4-b.dts | 348 ++------
|
|
arch/arm/boot/dts/bcm2711.dtsi | 888 ++++++++++++++++++++-
|
|
arch/arm/boot/dts/bcm2835-common.dtsi | 131 +++
|
|
arch/arm/boot/dts/bcm2835-rpi-a-plus.dts | 1 -
|
|
arch/arm/boot/dts/bcm2835-rpi-a.dts | 1 -
|
|
arch/arm/boot/dts/bcm2835-rpi-b-plus.dts | 1 -
|
|
arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts | 1 -
|
|
arch/arm/boot/dts/bcm2835-rpi-b.dts | 1 -
|
|
arch/arm/boot/dts/bcm2835-rpi-zero.dts | 1 -
|
|
arch/arm/boot/dts/bcm2835-rpi.dtsi | 37 -
|
|
arch/arm/boot/dts/bcm2836-rpi-2-b.dts | 1 -
|
|
arch/arm/boot/dts/bcm2837-rpi-3-b.dts | 1 -
|
|
arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi | 15 -
|
|
arch/arm/boot/dts/bcm283x.dtsi | 152 +---
|
|
14 files changed, 1068 insertions(+), 511 deletions(-)
|
|
|
|
--- a/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
|
+++ b/arch/arm/boot/dts/bcm2711-rpi-4-b.dts
|
|
@@ -1,54 +1,57 @@
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
/dts-v1/;
|
|
-
|
|
#include "bcm2711.dtsi"
|
|
-#include "bcm2711-rpi.dtsi"
|
|
-#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
+#include "bcm2835-rpi.dtsi"
|
|
+#include "bcm283x-rpi-usb-peripheral.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,4-model-b", "brcm,bcm2711";
|
|
model = "Raspberry Pi 4 Model B";
|
|
|
|
- memory@0 {
|
|
- device_type = "memory";
|
|
- reg = <0x0 0x0 0x0>;
|
|
+ chosen {
|
|
+ /* 8250 auxiliary UART instead of pl011 */
|
|
+ stdout-path = "serial1:115200n8";
|
|
};
|
|
|
|
- chosen {
|
|
- bootargs = "coherent_pool=1M 8250.nr_uarts=1 cma=64M";
|
|
+ /* Will be filled by the bootloader */
|
|
+ memory@0 {
|
|
+ device_type = "memory";
|
|
+ reg = <0 0 0>;
|
|
};
|
|
|
|
aliases {
|
|
- serial0 = &uart1;
|
|
- serial1 = &uart0;
|
|
- mmc0 = &emmc2;
|
|
- mmc1 = &mmcnr;
|
|
- mmc2 = &sdhost;
|
|
- i2c3 = &i2c3;
|
|
- i2c4 = &i2c4;
|
|
- i2c5 = &i2c5;
|
|
- i2c6 = &i2c6;
|
|
- /delete-property/ ethernet;
|
|
- /delete-property/ intc;
|
|
ethernet0 = &genet;
|
|
- pcie0 = &pcie_0;
|
|
};
|
|
-};
|
|
|
|
-&soc {
|
|
- virtgpio: virtgpio {
|
|
- compatible = "brcm,bcm2835-virtgpio";
|
|
- gpio-controller;
|
|
- #gpio-cells = <2>;
|
|
- firmware = <&firmware>;
|
|
- status = "okay";
|
|
+ leds {
|
|
+ act {
|
|
+ gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
|
|
+ };
|
|
+
|
|
+ pwr {
|
|
+ label = "PWR";
|
|
+ gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
};
|
|
-};
|
|
|
|
-&mmcnr {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&sdio_pins>;
|
|
- bus-width = <4>;
|
|
- status = "okay";
|
|
+ wifi_pwrseq: wifi-pwrseq {
|
|
+ compatible = "mmc-pwrseq-simple";
|
|
+ reset-gpios = <&expgpio 1 GPIO_ACTIVE_LOW>;
|
|
+ };
|
|
+
|
|
+ sd_io_1v8_reg: sd_io_1v8_reg {
|
|
+ compatible = "regulator-gpio";
|
|
+ regulator-name = "vdd-sd-io";
|
|
+ regulator-min-microvolt = <1800000>;
|
|
+ regulator-max-microvolt = <3300000>;
|
|
+ regulator-boot-on;
|
|
+ regulator-always-on;
|
|
+ regulator-settling-time-us = <5000>;
|
|
+ gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
|
|
+ states = <1800000 0x1
|
|
+ 3300000 0x0>;
|
|
+ status = "okay";
|
|
+ };
|
|
};
|
|
|
|
&firmware {
|
|
@@ -68,81 +71,34 @@
|
|
};
|
|
};
|
|
|
|
-&uart0 {
|
|
+&pwm1 {
|
|
pinctrl-names = "default";
|
|
- pinctrl-0 = <&uart0_pins &bt_pins>;
|
|
+ pinctrl-0 = <&pwm1_0_gpio40 &pwm1_1_gpio41>;
|
|
status = "okay";
|
|
};
|
|
|
|
-&uart1 {
|
|
+/* SDHCI is used to control the SDIO for wireless */
|
|
+&sdhci {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
pinctrl-names = "default";
|
|
- pinctrl-0 = <&uart1_pins>;
|
|
+ pinctrl-0 = <&emmc_gpio34>;
|
|
+ bus-width = <4>;
|
|
+ non-removable;
|
|
+ mmc-pwrseq = <&wifi_pwrseq>;
|
|
status = "okay";
|
|
-};
|
|
|
|
-&spi0 {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&spi0_pins &spi0_cs_pins>;
|
|
- cs-gpios = <&gpio 8 1>, <&gpio 7 1>;
|
|
-
|
|
- spidev0: spidev@0{
|
|
- compatible = "spidev";
|
|
- reg = <0>; /* CE0 */
|
|
- #address-cells = <1>;
|
|
- #size-cells = <0>;
|
|
- spi-max-frequency = <125000000>;
|
|
- };
|
|
-
|
|
- spidev1: spidev@1{
|
|
- compatible = "spidev";
|
|
- reg = <1>; /* CE1 */
|
|
- #address-cells = <1>;
|
|
- #size-cells = <0>;
|
|
- spi-max-frequency = <125000000>;
|
|
- };
|
|
-};
|
|
-
|
|
-// =============================================
|
|
-// Board specific stuff here
|
|
-
|
|
-/ {
|
|
-
|
|
- sd_io_1v8_reg: sd_io_1v8_reg {
|
|
- status = "okay";
|
|
- compatible = "regulator-gpio";
|
|
- vin-supply = <&vdd_5v0_reg>;
|
|
- regulator-name = "vdd-sd-io";
|
|
- regulator-min-microvolt = <1800000>;
|
|
- regulator-max-microvolt = <3300000>;
|
|
- regulator-boot-on;
|
|
- regulator-always-on;
|
|
- regulator-settling-time-us = <5000>;
|
|
-
|
|
- gpios = <&expgpio 4 GPIO_ACTIVE_HIGH>;
|
|
- states = <1800000 0x1
|
|
- 3300000 0x0>;
|
|
+ brcmf: wifi@1 {
|
|
+ reg = <1>;
|
|
+ compatible = "brcm,bcm4329-fmac";
|
|
};
|
|
-
|
|
- sd_vcc_reg: sd_vcc_reg {
|
|
- compatible = "regulator-fixed";
|
|
- regulator-name = "vcc-sd";
|
|
- regulator-min-microvolt = <3300000>;
|
|
- regulator-max-microvolt = <3300000>;
|
|
- regulator-boot-on;
|
|
- enable-active-high;
|
|
- gpio = <&expgpio 6 GPIO_ACTIVE_HIGH>;
|
|
- };
|
|
-};
|
|
-
|
|
-&sdhost {
|
|
- status = "disabled";
|
|
};
|
|
|
|
+/* EMMC2 is used to drive the SD card */
|
|
&emmc2 {
|
|
- status = "okay";
|
|
- broken-cd;
|
|
vqmmc-supply = <&sd_io_1v8_reg>;
|
|
- vmmc-supply = <&sd_vcc_reg>;
|
|
+ broken-cd;
|
|
+ status = "okay";
|
|
};
|
|
|
|
&genet {
|
|
@@ -155,200 +111,32 @@
|
|
phy1: ethernet-phy@1 {
|
|
/* No PHY interrupt */
|
|
reg = <0x1>;
|
|
- led-modes = <0x00 0x08>; /* link/activity link */
|
|
};
|
|
};
|
|
|
|
-&leds {
|
|
- act_led: act {
|
|
- label = "led0";
|
|
- linux,default-trigger = "mmc0";
|
|
- gpios = <&gpio 42 GPIO_ACTIVE_HIGH>;
|
|
- };
|
|
-
|
|
- pwr_led: pwr {
|
|
- label = "led1";
|
|
- linux,default-trigger = "default-on";
|
|
- gpios = <&expgpio 2 GPIO_ACTIVE_LOW>;
|
|
- };
|
|
-};
|
|
-
|
|
-&audio {
|
|
+/* uart0 communicates with the BT module */
|
|
+&uart0 {
|
|
pinctrl-names = "default";
|
|
- pinctrl-0 = <&audio_pins>;
|
|
-};
|
|
-
|
|
-&sdhost_gpio48 {
|
|
- brcm,pins = <22 23 24 25 26 27>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
-};
|
|
-
|
|
-&gpio {
|
|
- spi0_pins: spi0_pins {
|
|
- brcm,pins = <9 10 11>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
- };
|
|
-
|
|
- spi0_cs_pins: spi0_cs_pins {
|
|
- brcm,pins = <8 7>;
|
|
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
- };
|
|
-
|
|
- spi3_pins: spi3_pins {
|
|
- brcm,pins = <1 2 3>;
|
|
- brcm,function = <BCM2835_FSEL_ALT3>;
|
|
- };
|
|
-
|
|
- spi3_cs_pins: spi3_cs_pins {
|
|
- brcm,pins = <0 24>;
|
|
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
- };
|
|
-
|
|
- spi4_pins: spi4_pins {
|
|
- brcm,pins = <5 6 7>;
|
|
- brcm,function = <BCM2835_FSEL_ALT3>;
|
|
- };
|
|
-
|
|
- spi4_cs_pins: spi4_cs_pins {
|
|
- brcm,pins = <4 25>;
|
|
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
- };
|
|
-
|
|
- spi5_pins: spi5_pins {
|
|
- brcm,pins = <13 14 15>;
|
|
- brcm,function = <BCM2835_FSEL_ALT3>;
|
|
- };
|
|
-
|
|
- spi5_cs_pins: spi5_cs_pins {
|
|
- brcm,pins = <12 26>;
|
|
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
- };
|
|
-
|
|
- spi6_pins: spi6_pins {
|
|
- brcm,pins = <19 20 21>;
|
|
- brcm,function = <BCM2835_FSEL_ALT3>;
|
|
- };
|
|
-
|
|
- spi6_cs_pins: spi6_cs_pins {
|
|
- brcm,pins = <18 27>;
|
|
- brcm,function = <BCM2835_FSEL_GPIO_OUT>;
|
|
- };
|
|
-
|
|
- i2c0_pins: i2c0 {
|
|
- brcm,pins = <0 1>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
- brcm,pull = <BCM2835_PUD_UP>;
|
|
- };
|
|
-
|
|
- i2c1_pins: i2c1 {
|
|
- brcm,pins = <2 3>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
- brcm,pull = <BCM2835_PUD_UP>;
|
|
- };
|
|
-
|
|
- i2c3_pins: i2c3 {
|
|
- brcm,pins = <4 5>;
|
|
- brcm,function = <BCM2835_FSEL_ALT5>;
|
|
- brcm,pull = <BCM2835_PUD_UP>;
|
|
- };
|
|
-
|
|
- i2c4_pins: i2c4 {
|
|
- brcm,pins = <8 9>;
|
|
- brcm,function = <BCM2835_FSEL_ALT5>;
|
|
- brcm,pull = <BCM2835_PUD_UP>;
|
|
- };
|
|
-
|
|
- i2c5_pins: i2c5 {
|
|
- brcm,pins = <12 13>;
|
|
- brcm,function = <BCM2835_FSEL_ALT5>;
|
|
- brcm,pull = <BCM2835_PUD_UP>;
|
|
- };
|
|
-
|
|
- i2c6_pins: i2c6 {
|
|
- brcm,pins = <22 23>;
|
|
- brcm,function = <BCM2835_FSEL_ALT5>;
|
|
- brcm,pull = <BCM2835_PUD_UP>;
|
|
- };
|
|
-
|
|
- i2s_pins: i2s {
|
|
- brcm,pins = <18 19 20 21>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
- };
|
|
-
|
|
- sdio_pins: sdio_pins {
|
|
- brcm,pins = <34 35 36 37 38 39>;
|
|
- brcm,function = <BCM2835_FSEL_ALT3>; // alt3 = SD1
|
|
- brcm,pull = <0 2 2 2 2 2>;
|
|
- };
|
|
-
|
|
- bt_pins: bt_pins {
|
|
- brcm,pins = "-"; // non-empty to keep btuart happy, //4 = 0
|
|
- // to fool pinctrl
|
|
- brcm,function = <0>;
|
|
- brcm,pull = <2>;
|
|
- };
|
|
-
|
|
- uart0_pins: uart0_pins {
|
|
- brcm,pins = <32 33>;
|
|
- brcm,function = <BCM2835_FSEL_ALT3>;
|
|
- brcm,pull = <0 2>;
|
|
- };
|
|
-
|
|
- uart1_pins: uart1_pins {
|
|
- brcm,pins;
|
|
- brcm,function;
|
|
- brcm,pull;
|
|
- };
|
|
-
|
|
- uart2_pins: uart2_pins {
|
|
- brcm,pins = <0 1>;
|
|
- brcm,function = <BCM2835_FSEL_ALT4>;
|
|
- brcm,pull = <0 2>;
|
|
- };
|
|
-
|
|
- uart3_pins: uart3_pins {
|
|
- brcm,pins = <4 5>;
|
|
- brcm,function = <BCM2835_FSEL_ALT4>;
|
|
- brcm,pull = <0 2>;
|
|
- };
|
|
-
|
|
- uart4_pins: uart4_pins {
|
|
- brcm,pins = <8 9>;
|
|
- brcm,function = <BCM2835_FSEL_ALT4>;
|
|
- brcm,pull = <0 2>;
|
|
- };
|
|
-
|
|
- uart5_pins: uart5_pins {
|
|
- brcm,pins = <12 13>;
|
|
- brcm,function = <BCM2835_FSEL_ALT4>;
|
|
- brcm,pull = <0 2>;
|
|
- };
|
|
+ pinctrl-0 = <&uart0_ctsrts_gpio30 &uart0_gpio32>;
|
|
+ uart-has-rtscts;
|
|
+ status = "okay";
|
|
|
|
- audio_pins: audio_pins {
|
|
- brcm,pins = <40 41>;
|
|
- brcm,function = <4>;
|
|
+ bluetooth {
|
|
+ compatible = "brcm,bcm43438-bt";
|
|
+ max-speed = <2000000>;
|
|
+ shutdown-gpios = <&expgpio 0 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
-&i2c0 {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&i2c0_pins>;
|
|
- clock-frequency = <100000>;
|
|
-};
|
|
-
|
|
-&i2c1 {
|
|
+/* uart1 is mapped to the pin header */
|
|
+&uart1 {
|
|
pinctrl-names = "default";
|
|
- pinctrl-0 = <&i2c1_pins>;
|
|
- clock-frequency = <100000>;
|
|
-};
|
|
-
|
|
-&i2c2 {
|
|
- clock-frequency = <100000>;
|
|
+ pinctrl-0 = <&uart1_gpio14>;
|
|
+ status = "okay";
|
|
};
|
|
|
|
-&i2s {
|
|
- pinctrl-names = "default";
|
|
- pinctrl-0 = <&i2s_pins>;
|
|
+&vchiq {
|
|
+ interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
/ {
|
|
--- a/arch/arm/boot/dts/bcm2711.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm2711.dtsi
|
|
@@ -1,44 +1,890 @@
|
|
-#include "bcm2838.dtsi"
|
|
-#include "bcm270x.dtsi"
|
|
+// SPDX-License-Identifier: GPL-2.0
|
|
+#include "bcm283x.dtsi"
|
|
+
|
|
+#include <dt-bindings/interrupt-controller/arm-gic.h>
|
|
+#include <dt-bindings/soc/bcm2835-pm.h>
|
|
|
|
/ {
|
|
+ compatible = "brcm,bcm2711";
|
|
+
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ interrupt-parent = <&gicv2>;
|
|
+
|
|
+ reserved-memory {
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+ ranges;
|
|
+
|
|
+ /*
|
|
+ * arm64 reserves the CMA by default somewhere in ZONE_DMA32,
|
|
+ * that's not good enough for the BCM2711 as some devices can
|
|
+ * only address the lower 1G of memory (ZONE_DMA).
|
|
+ */
|
|
+ linux,cma {
|
|
+ compatible = "shared-dma-pool";
|
|
+ size = <0x2000000>; /* 32MB */
|
|
+ alloc-ranges = <0x0 0x00000000 0x40000000>;
|
|
+ reusable;
|
|
+ linux,cma-default;
|
|
+ };
|
|
+ };
|
|
+
|
|
+
|
|
soc {
|
|
- /delete-node/ v3d@7ec00000;
|
|
+ /*
|
|
+ * Defined ranges:
|
|
+ * Common BCM283x peripherals
|
|
+ * BCM2711-specific peripherals
|
|
+ * ARM-local peripherals
|
|
+ */
|
|
+ ranges = <0x7e000000 0x0 0xfe000000 0x01800000>,
|
|
+ <0x7c000000 0x0 0xfc000000 0x02000000>,
|
|
+ <0x40000000 0x0 0xff800000 0x00800000>;
|
|
+ /* Emulate a contiguous 30-bit address range for DMA */
|
|
+ dma-ranges = <0xc0000000 0x0 0x00000000 0x40000000>;
|
|
+
|
|
+ /*
|
|
+ * This node is the provider for the enable-method for
|
|
+ * bringing up secondary cores.
|
|
+ */
|
|
+ local_intc: local_intc@40000000 {
|
|
+ compatible = "brcm,bcm2836-l1-intc";
|
|
+ reg = <0x40000000 0x100>;
|
|
+ };
|
|
+
|
|
+ gicv2: interrupt-controller@40041000 {
|
|
+ interrupt-controller;
|
|
+ #interrupt-cells = <3>;
|
|
+ compatible = "arm,gic-400";
|
|
+ reg = <0x40041000 0x1000>,
|
|
+ <0x40042000 0x2000>,
|
|
+ <0x40044000 0x2000>,
|
|
+ <0x40046000 0x2000>;
|
|
+ interrupts = <GIC_PPI 9 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_HIGH)>;
|
|
+ };
|
|
+
|
|
+ dma: dma@7e007000 {
|
|
+ compatible = "brcm,bcm2835-dma";
|
|
+ reg = <0x7e007000 0xb00>;
|
|
+ interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ /* DMA lite 7 - 10 */
|
|
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-names = "dma0",
|
|
+ "dma1",
|
|
+ "dma2",
|
|
+ "dma3",
|
|
+ "dma4",
|
|
+ "dma5",
|
|
+ "dma6",
|
|
+ "dma7",
|
|
+ "dma8",
|
|
+ "dma9",
|
|
+ "dma10";
|
|
+ #dma-cells = <1>;
|
|
+ brcm,dma-channel-mask = <0x07f5>;
|
|
+ };
|
|
+
|
|
+ pm: watchdog@7e100000 {
|
|
+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
|
|
+ #power-domain-cells = <1>;
|
|
+ #reset-cells = <1>;
|
|
+ reg = <0x7e100000 0x114>,
|
|
+ <0x7e00a000 0x24>,
|
|
+ <0x7ec11000 0x20>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_V3D>,
|
|
+ <&clocks BCM2835_CLOCK_PERI_IMAGE>,
|
|
+ <&clocks BCM2835_CLOCK_H264>,
|
|
+ <&clocks BCM2835_CLOCK_ISP>;
|
|
+ clock-names = "v3d", "peri_image", "h264", "isp";
|
|
+ system-power-controller;
|
|
+ };
|
|
+
|
|
+ rng@7e104000 {
|
|
+ interrupts = <GIC_SPI 125 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ /* RNG is incompatible with brcm,bcm2835-rng */
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uart2: serial@7e201400 {
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
+ reg = <0x7e201400 0x200>;
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_UART>,
|
|
+ <&clocks BCM2835_CLOCK_VPU>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ arm,primecell-periphid = <0x00241011>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uart3: serial@7e201600 {
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
+ reg = <0x7e201600 0x200>;
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_UART>,
|
|
+ <&clocks BCM2835_CLOCK_VPU>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ arm,primecell-periphid = <0x00241011>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uart4: serial@7e201800 {
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
+ reg = <0x7e201800 0x200>;
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_UART>,
|
|
+ <&clocks BCM2835_CLOCK_VPU>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ arm,primecell-periphid = <0x00241011>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ uart5: serial@7e201a00 {
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
+ reg = <0x7e201a00 0x200>;
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_UART>,
|
|
+ <&clocks BCM2835_CLOCK_VPU>;
|
|
+ clock-names = "uartclk", "apb_pclk";
|
|
+ arm,primecell-periphid = <0x00241011>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spi3: spi@7e204600 {
|
|
+ compatible = "brcm,bcm2835-spi";
|
|
+ reg = <0x7e204600 0x0200>;
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spi4: spi@7e204800 {
|
|
+ compatible = "brcm,bcm2835-spi";
|
|
+ reg = <0x7e204800 0x0200>;
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spi5: spi@7e204a00 {
|
|
+ compatible = "brcm,bcm2835-spi";
|
|
+ reg = <0x7e204a00 0x0200>;
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ spi6: spi@7e204c00 {
|
|
+ compatible = "brcm,bcm2835-spi";
|
|
+ reg = <0x7e204c00 0x0200>;
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c3: i2c@7e205600 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7e205600 0x200>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c4: i2c@7e205800 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7e205800 0x200>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c5: i2c@7e205a00 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7e205a00 0x200>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ i2c6: i2c@7e205c00 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ reg = <0x7e205c00 0x200>;
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ pwm1: pwm@7e20c800 {
|
|
+ compatible = "brcm,bcm2835-pwm";
|
|
+ reg = <0x7e20c800 0x28>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_PWM>;
|
|
+ assigned-clocks = <&clocks BCM2835_CLOCK_PWM>;
|
|
+ assigned-clock-rates = <10000000>;
|
|
+ #pwm-cells = <2>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ emmc2: emmc2@7e340000 {
|
|
+ compatible = "brcm,bcm2711-emmc2";
|
|
+ reg = <0x7e340000 0x100>;
|
|
+ interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ clocks = <&clocks BCM2711_CLOCK_EMMC2>;
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
+ hvs@7e400000 {
|
|
+ interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ arm-pmu {
|
|
+ compatible = "arm,cortex-a72-pmu", "arm,armv8-pmuv3";
|
|
+ interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
|
|
+ };
|
|
+
|
|
+ timer {
|
|
+ compatible = "arm,armv8-timer";
|
|
+ interrupts = <GIC_PPI 13 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>,
|
|
+ <GIC_PPI 14 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>,
|
|
+ <GIC_PPI 11 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>,
|
|
+ <GIC_PPI 10 (GIC_CPU_MASK_SIMPLE(4) |
|
|
+ IRQ_TYPE_LEVEL_LOW)>;
|
|
+ /* This only applies to the ARMv7 stub */
|
|
+ arm,cpu-registers-not-fw-configured;
|
|
+ };
|
|
+
|
|
+ cpus: cpus {
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ enable-method = "brcm,bcm2836-smp"; // for ARM 32-bit
|
|
+
|
|
+ cpu0: cpu@0 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a72";
|
|
+ reg = <0>;
|
|
+ enable-method = "spin-table";
|
|
+ cpu-release-addr = <0x0 0x000000d8>;
|
|
+ };
|
|
+
|
|
+ cpu1: cpu@1 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a72";
|
|
+ reg = <1>;
|
|
+ enable-method = "spin-table";
|
|
+ cpu-release-addr = <0x0 0x000000e0>;
|
|
+ };
|
|
+
|
|
+ cpu2: cpu@2 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a72";
|
|
+ reg = <2>;
|
|
+ enable-method = "spin-table";
|
|
+ cpu-release-addr = <0x0 0x000000e8>;
|
|
+ };
|
|
+
|
|
+ cpu3: cpu@3 {
|
|
+ device_type = "cpu";
|
|
+ compatible = "arm,cortex-a72";
|
|
+ reg = <3>;
|
|
+ enable-method = "spin-table";
|
|
+ cpu-release-addr = <0x0 0x000000f0>;
|
|
+ };
|
|
};
|
|
|
|
- __overrides__ {
|
|
- arm_freq;
|
|
+ scb {
|
|
+ compatible = "simple-bus";
|
|
+ #address-cells = <2>;
|
|
+ #size-cells = <1>;
|
|
+
|
|
+ ranges = <0x0 0x7c000000 0x0 0xfc000000 0x03800000>;
|
|
+
|
|
+ genet: ethernet@7d580000 {
|
|
+ compatible = "brcm,bcm2711-genet-v5";
|
|
+ reg = <0x0 0x7d580000 0x10000>;
|
|
+ #address-cells = <0x1>;
|
|
+ #size-cells = <0x1>;
|
|
+ interrupts = <GIC_SPI 157 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 158 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ status = "disabled";
|
|
+
|
|
+ genet_mdio: mdio@e14 {
|
|
+ compatible = "brcm,genet-mdio-v5";
|
|
+ reg = <0xe14 0x8>;
|
|
+ reg-names = "mdio";
|
|
+ #address-cells = <0x0>;
|
|
+ #size-cells = <0x1>;
|
|
+ };
|
|
+ };
|
|
};
|
|
};
|
|
|
|
-&v3d {
|
|
- status = "disabled";
|
|
+&clk_osc {
|
|
+ clock-frequency = <54000000>;
|
|
};
|
|
|
|
-&firmwarekms {
|
|
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
|
+&clocks {
|
|
+ compatible = "brcm,bcm2711-cprman";
|
|
};
|
|
|
|
-&smi {
|
|
- interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
|
|
+&cpu_thermal {
|
|
+ coefficients = <(-487) 410040>;
|
|
};
|
|
|
|
-&mmc {
|
|
- interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
+&dsi0 {
|
|
+ interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&dsi1 {
|
|
+ interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&gpio {
|
|
+ compatible = "brcm,bcm2711-gpio";
|
|
+ interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
|
|
+
|
|
+ gpclk0_gpio49: gpclk0_gpio49 {
|
|
+ pin-gpclk {
|
|
+ pins = "gpio49";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ gpclk1_gpio50: gpclk1_gpio50 {
|
|
+ pin-gpclk {
|
|
+ pins = "gpio50";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ gpclk2_gpio51: gpclk2_gpio51 {
|
|
+ pin-gpclk {
|
|
+ pins = "gpio51";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ i2c0_gpio46: i2c0_gpio46 {
|
|
+ pin-sda {
|
|
+ function = "alt0";
|
|
+ pins = "gpio46";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt0";
|
|
+ pins = "gpio47";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c1_gpio46: i2c1_gpio46 {
|
|
+ pin-sda {
|
|
+ function = "alt1";
|
|
+ pins = "gpio46";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt1";
|
|
+ pins = "gpio47";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c3_gpio2: i2c3_gpio2 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio2";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio3";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c3_gpio4: i2c3_gpio4 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio5";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c4_gpio6: i2c4_gpio6 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio6";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio7";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c4_gpio8: i2c4_gpio8 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio8";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio9";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c5_gpio10: i2c5_gpio10 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio10";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio11";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c5_gpio12: i2c5_gpio12 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio12";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio13";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c6_gpio0: i2c6_gpio0 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio0";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c6_gpio22: i2c6_gpio22 {
|
|
+ pin-sda {
|
|
+ function = "alt5";
|
|
+ pins = "gpio22";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-scl {
|
|
+ function = "alt5";
|
|
+ pins = "gpio23";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ i2c_slave_gpio8: i2c_slave_gpio8 {
|
|
+ pins-i2c-slave {
|
|
+ pins = "gpio8",
|
|
+ "gpio9",
|
|
+ "gpio10",
|
|
+ "gpio11";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ jtag_gpio48: jtag_gpio48 {
|
|
+ pins-jtag {
|
|
+ pins = "gpio48",
|
|
+ "gpio49",
|
|
+ "gpio50",
|
|
+ "gpio51",
|
|
+ "gpio52",
|
|
+ "gpio53";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ mii_gpio28: mii_gpio28 {
|
|
+ pins-mii {
|
|
+ pins = "gpio28",
|
|
+ "gpio29",
|
|
+ "gpio30",
|
|
+ "gpio31";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+ mii_gpio36: mii_gpio36 {
|
|
+ pins-mii {
|
|
+ pins = "gpio36",
|
|
+ "gpio37",
|
|
+ "gpio38",
|
|
+ "gpio39";
|
|
+ function = "alt5";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pcm_gpio50: pcm_gpio50 {
|
|
+ pins-pcm {
|
|
+ pins = "gpio50",
|
|
+ "gpio51",
|
|
+ "gpio52",
|
|
+ "gpio53";
|
|
+ function = "alt2";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ pwm0_0_gpio12: pwm0_0_gpio12 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio12";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_0_gpio18: pwm0_0_gpio18 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio18";
|
|
+ function = "alt5";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm1_0_gpio40: pwm1_0_gpio40 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio40";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_1_gpio13: pwm0_1_gpio13 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio13";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_1_gpio19: pwm0_1_gpio19 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio19";
|
|
+ function = "alt5";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm1_1_gpio41: pwm1_1_gpio41 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio41";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_1_gpio45: pwm0_1_gpio45 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio45";
|
|
+ function = "alt0";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_0_gpio52: pwm0_0_gpio52 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio52";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ pwm0_1_gpio53: pwm0_1_gpio53 {
|
|
+ pin-pwm {
|
|
+ pins = "gpio53";
|
|
+ function = "alt1";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ rgmii_gpio35: rgmii_gpio35 {
|
|
+ pin-start-stop {
|
|
+ pins = "gpio35";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ pin-rx-ok {
|
|
+ pins = "gpio36";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+ rgmii_irq_gpio34: rgmii_irq_gpio34 {
|
|
+ pin-irq {
|
|
+ pins = "gpio34";
|
|
+ function = "alt5";
|
|
+ };
|
|
+ };
|
|
+ rgmii_irq_gpio39: rgmii_irq_gpio39 {
|
|
+ pin-irq {
|
|
+ pins = "gpio39";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+ rgmii_mdio_gpio28: rgmii_mdio_gpio28 {
|
|
+ pins-mdio {
|
|
+ pins = "gpio28",
|
|
+ "gpio29";
|
|
+ function = "alt5";
|
|
+ };
|
|
+ };
|
|
+ rgmii_mdio_gpio37: rgmii_mdio_gpio37 {
|
|
+ pins-mdio {
|
|
+ pins = "gpio37",
|
|
+ "gpio38";
|
|
+ function = "alt4";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spi0_gpio46: spi0_gpio46 {
|
|
+ pins-spi {
|
|
+ pins = "gpio46",
|
|
+ "gpio47",
|
|
+ "gpio48",
|
|
+ "gpio49";
|
|
+ function = "alt2";
|
|
+ };
|
|
+ };
|
|
+ spi2_gpio46: spi2_gpio46 {
|
|
+ pins-spi {
|
|
+ pins = "gpio46",
|
|
+ "gpio47",
|
|
+ "gpio48",
|
|
+ "gpio49",
|
|
+ "gpio50";
|
|
+ function = "alt5";
|
|
+ };
|
|
+ };
|
|
+ spi3_gpio0: spi3_gpio0 {
|
|
+ pins-spi {
|
|
+ pins = "gpio0",
|
|
+ "gpio1",
|
|
+ "gpio2",
|
|
+ "gpio3";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+ spi4_gpio4: spi4_gpio4 {
|
|
+ pins-spi {
|
|
+ pins = "gpio4",
|
|
+ "gpio5",
|
|
+ "gpio6",
|
|
+ "gpio7";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+ spi5_gpio12: spi5_gpio12 {
|
|
+ pins-spi {
|
|
+ pins = "gpio12",
|
|
+ "gpio13",
|
|
+ "gpio14",
|
|
+ "gpio15";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+ spi6_gpio18: spi6_gpio18 {
|
|
+ pins-spi {
|
|
+ pins = "gpio18",
|
|
+ "gpio19",
|
|
+ "gpio20",
|
|
+ "gpio21";
|
|
+ function = "alt3";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ uart2_gpio0: uart2_gpio0 {
|
|
+ pin-tx {
|
|
+ pins = "gpio0";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin-rx {
|
|
+ pins = "gpio1";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ uart2_ctsrts_gpio2: uart2_ctsrts_gpio2 {
|
|
+ pin-cts {
|
|
+ pins = "gpio2";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-rts {
|
|
+ pins = "gpio3";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ uart3_gpio4: uart3_gpio4 {
|
|
+ pin-tx {
|
|
+ pins = "gpio4";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin-rx {
|
|
+ pins = "gpio5";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ uart3_ctsrts_gpio6: uart3_ctsrts_gpio6 {
|
|
+ pin-cts {
|
|
+ pins = "gpio6";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-rts {
|
|
+ pins = "gpio7";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ uart4_gpio8: uart4_gpio8 {
|
|
+ pin-tx {
|
|
+ pins = "gpio8";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin-rx {
|
|
+ pins = "gpio9";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ uart4_ctsrts_gpio10: uart4_ctsrts_gpio10 {
|
|
+ pin-cts {
|
|
+ pins = "gpio10";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-rts {
|
|
+ pins = "gpio11";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
+ uart5_gpio12: uart5_gpio12 {
|
|
+ pin-tx {
|
|
+ pins = "gpio12";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ pin-rx {
|
|
+ pins = "gpio13";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ };
|
|
+ uart5_ctsrts_gpio14: uart5_ctsrts_gpio14 {
|
|
+ pin-cts {
|
|
+ pins = "gpio14";
|
|
+ function = "alt4";
|
|
+ bias-pull-up;
|
|
+ };
|
|
+ pin-rts {
|
|
+ pins = "gpio15";
|
|
+ function = "alt4";
|
|
+ bias-disable;
|
|
+ };
|
|
+ };
|
|
};
|
|
|
|
-&mmcnr {
|
|
+&i2c0 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&i2c1 {
|
|
+ compatible = "brcm,bcm2711-i2c", "brcm,bcm2835-i2c";
|
|
+ interrupts = <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&mailbox {
|
|
+ interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&sdhci {
|
|
interrupts = <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
+&sdhost {
|
|
+ interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&spi {
|
|
+ interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&spi1 {
|
|
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&spi2 {
|
|
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&system_timer {
|
|
+ interrupts = <GIC_SPI 64 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 65 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
|
|
+ <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&txp {
|
|
+ interrupts = <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&uart0 {
|
|
+ interrupts = <GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
+&uart1 {
|
|
+ interrupts = <GIC_SPI 93 IRQ_TYPE_LEVEL_HIGH>;
|
|
+};
|
|
+
|
|
&usb {
|
|
- reg = <0x7e980000 0x10000>,
|
|
- <0x7e00b200 0x200>;
|
|
- interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
|
|
- <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
|
|
+ interrupts = <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
|
|
-&gpio {
|
|
- interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>,
|
|
- <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH>;
|
|
+&vec {
|
|
+ interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
|
|
};
|
|
--- a/arch/arm/boot/dts/bcm2835-common.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm2835-common.dtsi
|
|
@@ -8,6 +8,47 @@
|
|
interrupt-parent = <&intc>;
|
|
|
|
soc {
|
|
+ dma: dma@7e007000 {
|
|
+ compatible = "brcm,bcm2835-dma";
|
|
+ reg = <0x7e007000 0xf00>;
|
|
+ interrupts = <1 16>,
|
|
+ <1 17>,
|
|
+ <1 18>,
|
|
+ <1 19>,
|
|
+ <1 20>,
|
|
+ <1 21>,
|
|
+ <1 22>,
|
|
+ <1 23>,
|
|
+ <1 24>,
|
|
+ <1 25>,
|
|
+ <1 26>,
|
|
+ /* dma channel 11-14 share one irq */
|
|
+ <1 27>,
|
|
+ <1 27>,
|
|
+ <1 27>,
|
|
+ <1 27>,
|
|
+ /* unused shared irq for all channels */
|
|
+ <1 28>;
|
|
+ interrupt-names = "dma0",
|
|
+ "dma1",
|
|
+ "dma2",
|
|
+ "dma3",
|
|
+ "dma4",
|
|
+ "dma5",
|
|
+ "dma6",
|
|
+ "dma7",
|
|
+ "dma8",
|
|
+ "dma9",
|
|
+ "dma10",
|
|
+ "dma11",
|
|
+ "dma12",
|
|
+ "dma13",
|
|
+ "dma14",
|
|
+ "dma-shared-all";
|
|
+ #dma-cells = <1>;
|
|
+ brcm,dma-channel-mask = <0x7f35>;
|
|
+ };
|
|
+
|
|
intc: interrupt-controller@7e00b200 {
|
|
compatible = "brcm,bcm2835-armctrl-ic";
|
|
reg = <0x7e00b200 0x200>;
|
|
@@ -15,6 +56,20 @@
|
|
#interrupt-cells = <2>;
|
|
};
|
|
|
|
+ pm: watchdog@7e100000 {
|
|
+ compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
|
|
+ #power-domain-cells = <1>;
|
|
+ #reset-cells = <1>;
|
|
+ reg = <0x7e100000 0x114>,
|
|
+ <0x7e00a000 0x24>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_V3D>,
|
|
+ <&clocks BCM2835_CLOCK_PERI_IMAGE>,
|
|
+ <&clocks BCM2835_CLOCK_H264>,
|
|
+ <&clocks BCM2835_CLOCK_ISP>;
|
|
+ clock-names = "v3d", "peri_image", "h264", "isp";
|
|
+ system-power-controller;
|
|
+ };
|
|
+
|
|
pixelvalve@7e206000 {
|
|
compatible = "brcm,bcm2835-pixelvalve0";
|
|
reg = <0x7e206000 0x100>;
|
|
@@ -35,21 +90,53 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
+ i2c2: i2c@7e805000 {
|
|
+ compatible = "brcm,bcm2835-i2c";
|
|
+ reg = <0x7e805000 0x1000>;
|
|
+ interrupts = <2 21>;
|
|
+ clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+ status = "okay";
|
|
+ };
|
|
+
|
|
pixelvalve@7e807000 {
|
|
compatible = "brcm,bcm2835-pixelvalve2";
|
|
reg = <0x7e807000 0x100>;
|
|
interrupts = <2 10>; /* pixelvalve */
|
|
};
|
|
|
|
+ hdmi: hdmi@7e902000 {
|
|
+ compatible = "brcm,bcm2835-hdmi";
|
|
+ reg = <0x7e902000 0x600>,
|
|
+ <0x7e808000 0x100>;
|
|
+ interrupts = <2 8>, <2 9>;
|
|
+ ddc = <&i2c2>;
|
|
+ clocks = <&clocks BCM2835_PLLH_PIX>,
|
|
+ <&clocks BCM2835_CLOCK_HSM>;
|
|
+ clock-names = "pixel", "hdmi";
|
|
+ dmas = <&dma 17>;
|
|
+ dma-names = "audio-rx";
|
|
+ status = "disabled";
|
|
+ };
|
|
+
|
|
v3d: v3d@7ec00000 {
|
|
compatible = "brcm,bcm2835-v3d";
|
|
reg = <0x7ec00000 0x1000>;
|
|
interrupts = <1 10>;
|
|
power-domains = <&pm BCM2835_POWER_DOMAIN_GRAFX_V3D>;
|
|
};
|
|
+
|
|
+ vc4: gpu {
|
|
+ compatible = "brcm,bcm2835-vc4";
|
|
+ };
|
|
};
|
|
};
|
|
|
|
+&cpu_thermal {
|
|
+ thermal-sensors = <&thermal>;
|
|
+};
|
|
+
|
|
&gpio {
|
|
i2c_slave_gpio18: i2c_slave_gpio18 {
|
|
brcm,pins = <18 19 20 21>;
|
|
@@ -60,4 +147,48 @@
|
|
brcm,pins = <4 5 6 12 13>;
|
|
brcm,function = <BCM2835_FSEL_ALT5>;
|
|
};
|
|
+
|
|
+ pwm0_gpio12: pwm0_gpio12 {
|
|
+ brcm,pins = <12>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+ pwm0_gpio18: pwm0_gpio18 {
|
|
+ brcm,pins = <18>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ };
|
|
+ pwm0_gpio40: pwm0_gpio40 {
|
|
+ brcm,pins = <40>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+ pwm1_gpio13: pwm1_gpio13 {
|
|
+ brcm,pins = <13>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+ pwm1_gpio19: pwm1_gpio19 {
|
|
+ brcm,pins = <19>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT5>;
|
|
+ };
|
|
+ pwm1_gpio41: pwm1_gpio41 {
|
|
+ brcm,pins = <41>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+ pwm1_gpio45: pwm1_gpio45 {
|
|
+ brcm,pins = <45>;
|
|
+ brcm,function = <BCM2835_FSEL_ALT0>;
|
|
+ };
|
|
+};
|
|
+
|
|
+&i2s {
|
|
+ dmas = <&dma 2>, <&dma 3>;
|
|
+ dma-names = "tx", "rx";
|
|
+};
|
|
+
|
|
+&sdhost {
|
|
+ dmas = <&dma 13>;
|
|
+ dma-names = "rx-tx";
|
|
+};
|
|
+
|
|
+&spi {
|
|
+ dmas = <&dma 6>, <&dma 7>;
|
|
+ dma-names = "tx", "rx";
|
|
};
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-a-plus.dts
|
|
@@ -3,7 +3,6 @@
|
|
#include "bcm2835.dtsi"
|
|
#include "bcm2835-rpi.dtsi"
|
|
#include "bcm283x-rpi-usb-host.dtsi"
|
|
-#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,model-a-plus", "brcm,bcm2835";
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-a.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-a.dts
|
|
@@ -3,7 +3,6 @@
|
|
#include "bcm2835.dtsi"
|
|
#include "bcm2835-rpi.dtsi"
|
|
#include "bcm283x-rpi-usb-host.dtsi"
|
|
-#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,model-a", "brcm,bcm2835";
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-plus.dts
|
|
@@ -4,7 +4,6 @@
|
|
#include "bcm2835-rpi.dtsi"
|
|
#include "bcm283x-rpi-smsc9514.dtsi"
|
|
#include "bcm283x-rpi-usb-host.dtsi"
|
|
-#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,model-b-plus", "brcm,bcm2835";
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-b-rev2.dts
|
|
@@ -4,7 +4,6 @@
|
|
#include "bcm2835-rpi.dtsi"
|
|
#include "bcm283x-rpi-smsc9512.dtsi"
|
|
#include "bcm283x-rpi-usb-host.dtsi"
|
|
-#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,model-b-rev2", "brcm,bcm2835";
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-b.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-b.dts
|
|
@@ -4,7 +4,6 @@
|
|
#include "bcm2835-rpi.dtsi"
|
|
#include "bcm283x-rpi-smsc9512.dtsi"
|
|
#include "bcm283x-rpi-usb-host.dtsi"
|
|
-#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,model-b", "brcm,bcm2835";
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi-zero.dts
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi-zero.dts
|
|
@@ -7,7 +7,6 @@
|
|
#include "bcm2835.dtsi"
|
|
#include "bcm2835-rpi.dtsi"
|
|
#include "bcm283x-rpi-usb-otg.dtsi"
|
|
-#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,model-zero", "brcm,bcm2835";
|
|
--- a/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm2835-rpi.dtsi
|
|
@@ -29,22 +29,6 @@
|
|
interrupts = <0 2>;
|
|
};
|
|
};
|
|
-
|
|
- vdd_3v3_reg: fixedregulator_3v3 {
|
|
- compatible = "regulator-fixed";
|
|
- regulator-name = "3v3";
|
|
- regulator-min-microvolt = <3300000>;
|
|
- regulator-max-microvolt = <3300000>;
|
|
- regulator-always-on;
|
|
- };
|
|
-
|
|
- vdd_5v0_reg: fixedregulator_5v0 {
|
|
- compatible = "regulator-fixed";
|
|
- regulator-name = "5v0";
|
|
- regulator-min-microvolt = <5000000>;
|
|
- regulator-max-microvolt = <5000000>;
|
|
- regulator-always-on;
|
|
- };
|
|
};
|
|
|
|
&gpio {
|
|
@@ -75,23 +59,10 @@
|
|
clock-frequency = <100000>;
|
|
};
|
|
|
|
-&i2c2 {
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
&usb {
|
|
power-domains = <&power RPI_POWER_DOMAIN_USB>;
|
|
};
|
|
|
|
-&hdmi {
|
|
- power-domains = <&power RPI_POWER_DOMAIN_HDMI>;
|
|
- status = "okay";
|
|
-};
|
|
-
|
|
-&v3d {
|
|
- power-domains = <&power RPI_POWER_DOMAIN_V3D>;
|
|
-};
|
|
-
|
|
&vec {
|
|
power-domains = <&power RPI_POWER_DOMAIN_VEC>;
|
|
status = "okay";
|
|
@@ -104,11 +75,3 @@
|
|
&dsi1 {
|
|
power-domains = <&power RPI_POWER_DOMAIN_DSI1>;
|
|
};
|
|
-
|
|
-&csi0 {
|
|
- power-domains = <&power RPI_POWER_DOMAIN_UNICAM0>;
|
|
-};
|
|
-
|
|
-&csi1 {
|
|
- power-domains = <&power RPI_POWER_DOMAIN_UNICAM1>;
|
|
-};
|
|
--- a/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
|
|
+++ b/arch/arm/boot/dts/bcm2836-rpi-2-b.dts
|
|
@@ -4,7 +4,6 @@
|
|
#include "bcm2836-rpi.dtsi"
|
|
#include "bcm283x-rpi-smsc9514.dtsi"
|
|
#include "bcm283x-rpi-usb-host.dtsi"
|
|
-#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,2-model-b", "brcm,bcm2836";
|
|
--- a/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
|
+++ b/arch/arm/boot/dts/bcm2837-rpi-3-b.dts
|
|
@@ -4,7 +4,6 @@
|
|
#include "bcm2836-rpi.dtsi"
|
|
#include "bcm283x-rpi-smsc9514.dtsi"
|
|
#include "bcm283x-rpi-usb-host.dtsi"
|
|
-#include "bcm283x-rpi-csi1-2lane.dtsi"
|
|
|
|
/ {
|
|
compatible = "raspberrypi,3-model-b", "brcm,bcm2837";
|
|
--- a/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm283x-rpi-lan7515.dtsi
|
|
@@ -29,9 +29,6 @@
|
|
#size-cells = <0x0>;
|
|
eth_phy: ethernet-phy@1 {
|
|
reg = <1>;
|
|
- microchip,eee-enabled;
|
|
- microchip,tx-lpi-timer = <600>; /* non-aggressive*/
|
|
- microchip,downshift-after = <2>;
|
|
microchip,led-modes = <
|
|
LAN78XX_LINK_1000_ACTIVITY
|
|
LAN78XX_LINK_10_100_ACTIVITY
|
|
@@ -42,15 +39,3 @@
|
|
};
|
|
};
|
|
};
|
|
-
|
|
-
|
|
-/ {
|
|
- __overrides__ {
|
|
- eee = <ð_phy>,"microchip,eee-enabled?";
|
|
- tx_lpi_timer = <ð_phy>,"microchip,tx-lpi-timer:0";
|
|
- eth_led0 = <ð_phy>,"microchip,led-modes:0";
|
|
- eth_led1 = <ð_phy>,"microchip,led-modes:4";
|
|
- eth_downshift_after = <ð_phy>,"microchip,downshift-after:0";
|
|
- eth_max_speed = <ð_phy>,"max-speed:0";
|
|
- };
|
|
-};
|
|
--- a/arch/arm/boot/dts/bcm283x.dtsi
|
|
+++ b/arch/arm/boot/dts/bcm283x.dtsi
|
|
@@ -35,8 +35,6 @@
|
|
polling-delay-passive = <0>;
|
|
polling-delay = <1000>;
|
|
|
|
- thermal-sensors = <&thermal>;
|
|
-
|
|
trips {
|
|
cpu-crit {
|
|
temperature = <90000>;
|
|
@@ -72,61 +70,6 @@
|
|
interrupts = <1 11>;
|
|
};
|
|
|
|
- dma: dma@7e007000 {
|
|
- compatible = "brcm,bcm2835-dma";
|
|
- reg = <0x7e007000 0xf00>;
|
|
- interrupts = <1 16>,
|
|
- <1 17>,
|
|
- <1 18>,
|
|
- <1 19>,
|
|
- <1 20>,
|
|
- <1 21>,
|
|
- <1 22>,
|
|
- <1 23>,
|
|
- <1 24>,
|
|
- <1 25>,
|
|
- <1 26>,
|
|
- /* dma channel 11-14 share one irq */
|
|
- <1 27>,
|
|
- <1 27>,
|
|
- <1 27>,
|
|
- <1 27>,
|
|
- /* unused shared irq for all channels */
|
|
- <1 28>;
|
|
- interrupt-names = "dma0",
|
|
- "dma1",
|
|
- "dma2",
|
|
- "dma3",
|
|
- "dma4",
|
|
- "dma5",
|
|
- "dma6",
|
|
- "dma7",
|
|
- "dma8",
|
|
- "dma9",
|
|
- "dma10",
|
|
- "dma11",
|
|
- "dma12",
|
|
- "dma13",
|
|
- "dma14",
|
|
- "dma-shared-all";
|
|
- #dma-cells = <1>;
|
|
- brcm,dma-channel-mask = <0x7f35>;
|
|
- };
|
|
-
|
|
- pm: watchdog@7e100000 {
|
|
- compatible = "brcm,bcm2835-pm", "brcm,bcm2835-pm-wdt";
|
|
- #power-domain-cells = <1>;
|
|
- #reset-cells = <1>;
|
|
- reg = <0x7e100000 0x114>,
|
|
- <0x7e00a000 0x24>;
|
|
- clocks = <&clocks BCM2835_CLOCK_V3D>,
|
|
- <&clocks BCM2835_CLOCK_PERI_IMAGE>,
|
|
- <&clocks BCM2835_CLOCK_H264>,
|
|
- <&clocks BCM2835_CLOCK_ISP>;
|
|
- clock-names = "v3d", "peri_image", "h264", "isp";
|
|
- system-power-controller;
|
|
- };
|
|
-
|
|
clocks: cprman@7e101000 {
|
|
compatible = "brcm,bcm2835-cprman";
|
|
#clock-cells = <1>;
|
|
@@ -141,7 +84,7 @@
|
|
<&dsi1 0>, <&dsi1 1>, <&dsi1 2>;
|
|
};
|
|
|
|
- rng: rng@7e104000 {
|
|
+ rng@7e104000 {
|
|
compatible = "brcm,bcm2835-rng";
|
|
reg = <0x7e104000 0x10>;
|
|
interrupts = <2 29>;
|
|
@@ -269,35 +212,6 @@
|
|
brcm,function = <BCM2835_FSEL_ALT2>;
|
|
};
|
|
|
|
- pwm0_gpio12: pwm0_gpio12 {
|
|
- brcm,pins = <12>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
- };
|
|
- pwm0_gpio18: pwm0_gpio18 {
|
|
- brcm,pins = <18>;
|
|
- brcm,function = <BCM2835_FSEL_ALT5>;
|
|
- };
|
|
- pwm0_gpio40: pwm0_gpio40 {
|
|
- brcm,pins = <40>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
- };
|
|
- pwm1_gpio13: pwm1_gpio13 {
|
|
- brcm,pins = <13>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
- };
|
|
- pwm1_gpio19: pwm1_gpio19 {
|
|
- brcm,pins = <19>;
|
|
- brcm,function = <BCM2835_FSEL_ALT5>;
|
|
- };
|
|
- pwm1_gpio41: pwm1_gpio41 {
|
|
- brcm,pins = <41>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
- };
|
|
- pwm1_gpio45: pwm1_gpio45 {
|
|
- brcm,pins = <45>;
|
|
- brcm,function = <BCM2835_FSEL_ALT0>;
|
|
- };
|
|
-
|
|
sdhost_gpio48: sdhost_gpio48 {
|
|
brcm,pins = <48 49 50 51 52 53>;
|
|
brcm,function = <BCM2835_FSEL_ALT0>;
|
|
@@ -379,7 +293,7 @@
|
|
};
|
|
|
|
uart0: serial@7e201000 {
|
|
- compatible = "brcm,bcm2835-pl011", "arm,pl011", "arm,primecell";
|
|
+ compatible = "arm,pl011", "arm,primecell";
|
|
reg = <0x7e201000 0x200>;
|
|
interrupts = <2 25>;
|
|
clocks = <&clocks BCM2835_CLOCK_UART>,
|
|
@@ -393,8 +307,6 @@
|
|
reg = <0x7e202000 0x100>;
|
|
interrupts = <2 24>;
|
|
clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
- dmas = <&dma (13|(1<<29))>;
|
|
- dma-names = "rx-tx";
|
|
status = "disabled";
|
|
};
|
|
|
|
@@ -402,10 +314,6 @@
|
|
compatible = "brcm,bcm2835-i2s";
|
|
reg = <0x7e203000 0x24>;
|
|
clocks = <&clocks BCM2835_CLOCK_PCM>;
|
|
-
|
|
- dmas = <&dma 2>,
|
|
- <&dma 3>;
|
|
- dma-names = "tx", "rx";
|
|
status = "disabled";
|
|
};
|
|
|
|
@@ -414,8 +322,6 @@
|
|
reg = <0x7e204000 0x200>;
|
|
interrupts = <2 22>;
|
|
clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
- dmas = <&dma 6>, <&dma 7>;
|
|
- dma-names = "tx", "rx";
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "disabled";
|
|
@@ -540,32 +446,6 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
- csi0: csi@7e800000 {
|
|
- compatible = "brcm,bcm2835-unicam";
|
|
- reg = <0x7e800000 0x800>,
|
|
- <0x7e802000 0x4>;
|
|
- interrupts = <2 6>;
|
|
- clocks = <&clocks BCM2835_CLOCK_CAM0>;
|
|
- clock-names = "lp";
|
|
- #address-cells = <1>;
|
|
- #size-cells = <0>;
|
|
- #clock-cells = <1>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
- csi1: csi@7e801000 {
|
|
- compatible = "brcm,bcm2835-unicam";
|
|
- reg = <0x7e801000 0x800>,
|
|
- <0x7e802004 0x4>;
|
|
- interrupts = <2 7>;
|
|
- clocks = <&clocks BCM2835_CLOCK_CAM1>;
|
|
- clock-names = "lp";
|
|
- #address-cells = <1>;
|
|
- #size-cells = <0>;
|
|
- #clock-cells = <1>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
i2c1: i2c@7e804000 {
|
|
compatible = "brcm,bcm2835-i2c";
|
|
reg = <0x7e804000 0x1000>;
|
|
@@ -576,16 +456,6 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
- i2c2: i2c@7e805000 {
|
|
- compatible = "brcm,bcm2835-i2c";
|
|
- reg = <0x7e805000 0x1000>;
|
|
- interrupts = <2 21>;
|
|
- clocks = <&clocks BCM2835_CLOCK_VPU>;
|
|
- #address-cells = <1>;
|
|
- #size-cells = <0>;
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
vec: vec@7e806000 {
|
|
compatible = "brcm,bcm2835-vec";
|
|
reg = <0x7e806000 0x1000>;
|
|
@@ -594,20 +464,6 @@
|
|
status = "disabled";
|
|
};
|
|
|
|
- hdmi: hdmi@7e902000 {
|
|
- compatible = "brcm,bcm2835-hdmi";
|
|
- reg = <0x7e902000 0x600>,
|
|
- <0x7e808000 0x100>;
|
|
- interrupts = <2 8>, <2 9>;
|
|
- ddc = <&i2c2>;
|
|
- clocks = <&clocks BCM2835_PLLH_PIX>,
|
|
- <&clocks BCM2835_CLOCK_HSM>;
|
|
- clock-names = "pixel", "hdmi";
|
|
- dmas = <&dma 17>;
|
|
- dma-names = "audio-rx";
|
|
- status = "disabled";
|
|
- };
|
|
-
|
|
usb: usb@7e980000 {
|
|
compatible = "brcm,bcm2835-usb";
|
|
reg = <0x7e980000 0x10000>;
|
|
@@ -619,10 +475,6 @@
|
|
phys = <&usbphy>;
|
|
phy-names = "usb2-phy";
|
|
};
|
|
-
|
|
- vc4: gpu {
|
|
- compatible = "brcm,bcm2835-vc4";
|
|
- };
|
|
};
|
|
|
|
clocks {
|