mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-23 07:22:33 +00:00
f04e377a50
QCA808x does not currently fill in the possible_interfaces. This leads to Phylink not being aware that it supports 2500Base-X as well so in cases where it is connected to a DSA switch like MV88E6393 it will limit that port to phy-mode set in the DTS. That means that if SGMII is used you are limited to 1G only while if 2500Base-X was set you are limited to 2.5G only. Populating the possible_interfaces fixes this, so lets backport the patches from kernel 6.9. This also includes a backport of the Phylink PHY validation series from kernel 6.8 that allows the use of possible_interfaces. Link: https://github.com/openwrt/openwrt/pull/15765 Signed-off-by: Robert Marko <robimarko@gmail.com>
51 lines
1.7 KiB
Diff
51 lines
1.7 KiB
Diff
From f058b2dd70b1a5503dff899010aeb53b436091e5 Mon Sep 17 00:00:00 2001
|
|
From: Robert Marko <robimarko@gmail.com>
|
|
Date: Wed, 28 Feb 2024 18:24:09 +0100
|
|
Subject: [PATCH 1/2] net: phy: qcom: qca808x: add helper for checking for 1G
|
|
only model
|
|
|
|
There are 2 versions of QCA808x, one 2.5G capable and one 1G capable.
|
|
Currently, this matter only in the .get_features call however, it will
|
|
be required for filling supported interface modes so lets add a helper
|
|
that can be reused.
|
|
|
|
Signed-off-by: Robert Marko <robimarko@gmail.com>
|
|
Signed-off-by: David S. Miller <davem@davemloft.net>
|
|
---
|
|
drivers/net/phy/qcom/qca808x.c | 17 ++++++++++++-----
|
|
1 file changed, 12 insertions(+), 5 deletions(-)
|
|
|
|
--- a/drivers/net/phy/qcom/qca808x.c
|
|
+++ b/drivers/net/phy/qcom/qca808x.c
|
|
@@ -156,6 +156,17 @@ static bool qca808x_has_fast_retrain_or_
|
|
return linkmode_test_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported);
|
|
}
|
|
|
|
+static bool qca808x_is_1g_only(struct phy_device *phydev)
|
|
+{
|
|
+ int ret;
|
|
+
|
|
+ ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE);
|
|
+ if (ret < 0)
|
|
+ return true;
|
|
+
|
|
+ return !!(QCA808X_PHY_CHIP_TYPE_1G & ret);
|
|
+}
|
|
+
|
|
static int qca808x_probe(struct phy_device *phydev)
|
|
{
|
|
struct device *dev = &phydev->mdio.dev;
|
|
@@ -350,11 +361,7 @@ static int qca808x_get_features(struct p
|
|
* existed in the bit0 of MMD1.21, we need to remove it manually if
|
|
* it is the qca8081 1G chip according to the bit0 of MMD7.0x901d.
|
|
*/
|
|
- ret = phy_read_mmd(phydev, MDIO_MMD_AN, QCA808X_PHY_MMD7_CHIP_TYPE);
|
|
- if (ret < 0)
|
|
- return ret;
|
|
-
|
|
- if (QCA808X_PHY_CHIP_TYPE_1G & ret)
|
|
+ if (qca808x_is_1g_only(phydev))
|
|
linkmode_clear_bit(ETHTOOL_LINK_MODE_2500baseT_Full_BIT, phydev->supported);
|
|
|
|
return 0;
|