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9cfa5f7417
This fixes the following compile problem:
````
CC arch/mips/kernel/vpe-mt.o
arch/mips/kernel/vpe-mt.c: In function 'vpe_run':
arch/mips/kernel/vpe-mt.c:32:23: error: unused variable 'physical_memsize' [-Werror=unused-variable]
32 | unsigned long physical_memsize = 0L;
| ^~~~~~~~~~~~~~~~
cc1: all warnings being treated as errors
make[6]: *** [scripts/Makefile.build:289: arch/mips/kernel/vpe-mt.o] Error 1
````
physical_memsize was removed from upstream kernel, see:
https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=linux-5.15.y&id=5b4f6c5ff65c8551018ccea40c569afd759734c0
Fixes: 387fde0da0 ("kernel: bump 5.15 to 5.15.150")
Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
188 lines
4.9 KiB
Diff
188 lines
4.9 KiB
Diff
From 4d48a3d1ef6f8d036bd926e3c1f70b56fcc679b2 Mon Sep 17 00:00:00 2001
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From: Stefan Koch <stefan.koch10@gmail.com>
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Date: Thu, 20 Oct 2016 21:32:00 +0200
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Subject: [PATCH] lantiq: vpe
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Signed-off-by: Stefan Koch <stefan.koch10@gmail.com>
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---
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arch/mips/Kconfig | 6 ++++
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arch/mips/include/asm/mipsmtregs.h | 5 ++++
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arch/mips/include/asm/vpe.h | 9 ++++++
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arch/mips/kernel/vpe-mt.c | 47 ++++++++++++++++++++++++++++++
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arch/mips/kernel/vpe.c | 35 ++++++++++++++++++++++
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arch/mips/lantiq/prom.c | 4 +++
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6 files changed, 106 insertions(+)
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--- a/arch/mips/Kconfig
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+++ b/arch/mips/Kconfig
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@@ -2433,6 +2433,12 @@ config MIPS_VPE_LOADER
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Includes a loader for loading an elf relocatable object
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onto another VPE and running it.
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+config IFX_VPE_EXT
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+ bool "IFX APRP Extensions"
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+ depends on MIPS_VPE_LOADER
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+ help
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+ IFX included extensions in APRP
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+
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config MIPS_VPE_LOADER_CMP
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bool
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default "y"
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--- a/arch/mips/include/asm/mipsmtregs.h
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+++ b/arch/mips/include/asm/mipsmtregs.h
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@@ -32,6 +32,9 @@
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#define read_c0_vpeconf1() __read_32bit_c0_register($1, 3)
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#define write_c0_vpeconf1(val) __write_32bit_c0_register($1, 3, val)
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+#define read_c0_vpeopt() __read_32bit_c0_register($1, 7)
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+#define write_c0_vpeopt(val) __write_32bit_c0_register($1, 7, val)
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+
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#define read_c0_tcstatus() __read_32bit_c0_register($2, 1)
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#define write_c0_tcstatus(val) __write_32bit_c0_register($2, 1, val)
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@@ -378,6 +381,8 @@ do { \
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#define write_vpe_c0_vpeconf0(val) mttc0(1, 2, val)
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#define read_vpe_c0_vpeconf1() mftc0(1, 3)
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#define write_vpe_c0_vpeconf1(val) mttc0(1, 3, val)
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+#define read_vpe_c0_vpeopt() mftc0(1, 7)
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+#define write_vpe_c0_vpeopt(val) mttc0(1, 7, val)
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#define read_vpe_c0_count() mftc0(9, 0)
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#define write_vpe_c0_count(val) mttc0(9, 0, val)
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#define read_vpe_c0_status() mftc0(12, 0)
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--- a/arch/mips/include/asm/vpe.h
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+++ b/arch/mips/include/asm/vpe.h
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@@ -123,4 +123,13 @@ void cleanup_tc(struct tc *tc);
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int __init vpe_module_init(void);
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void __exit vpe_module_exit(void);
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+
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+/* For the explanation of the APIs please refer the section "MT APRP Kernel
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+ * Programming" in AR9 SW Architecture Specification
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+ */
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+int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags);
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+int32_t vpe1_sw_stop(uint32_t flags);
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+uint32_t vpe1_get_load_addr(uint32_t flags);
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+uint32_t vpe1_get_max_mem(uint32_t flags);
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+
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#endif /* _ASM_VPE_H */
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--- a/arch/mips/kernel/vpe-mt.c
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+++ b/arch/mips/kernel/vpe-mt.c
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@@ -415,6 +415,8 @@ int __init vpe_module_init(void)
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}
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v->ntcs = hw_tcs - aprp_cpu_index();
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+ write_tc_c0_tcbind((read_tc_c0_tcbind() &
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+ ~TCBIND_CURVPE) | 1);
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/* add the tc to the list of this vpe's tc's. */
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list_add(&t->tc, &v->tc);
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@@ -518,3 +520,47 @@ void __exit vpe_module_exit(void)
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release_vpe(v);
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}
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}
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+
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+#ifdef CONFIG_IFX_VPE_EXT
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+int32_t vpe1_sw_start(void *sw_start_addr, uint32_t tcmask, uint32_t flags)
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+{
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+ enum vpe_state state;
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+ struct vpe *v = get_vpe(tclimit);
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+ struct vpe_notifications *not;
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+
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+ if (tcmask || flags) {
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+ pr_warn("Currently tcmask and flags should be 0. Other values are not supported\n");
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+ return -1;
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+ }
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+
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+ state = xchg(&v->state, VPE_STATE_INUSE);
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+ if (state != VPE_STATE_UNUSED) {
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+ vpe_stop(v);
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+
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+ list_for_each_entry(not, &v->notify, list) {
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+ not->stop(tclimit);
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+ }
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+ }
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+
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+ v->__start = (unsigned long)sw_start_addr;
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+
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+ if (!vpe_run(v)) {
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+ pr_debug("VPE loader: VPE1 running successfully\n");
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+ return 0;
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+ }
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+ return -1;
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+}
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+EXPORT_SYMBOL(vpe1_sw_start);
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+
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+int32_t vpe1_sw_stop(uint32_t flags)
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+{
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+ struct vpe *v = get_vpe(tclimit);
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+
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+ if (!vpe_free(v)) {
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+ pr_debug("RP Stopped\n");
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+ return 0;
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+ } else
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+ return -1;
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+}
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+EXPORT_SYMBOL(vpe1_sw_stop);
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+#endif
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--- a/arch/mips/kernel/vpe.c
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+++ b/arch/mips/kernel/vpe.c
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@@ -49,6 +49,41 @@ struct vpe_control vpecontrol = {
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.tc_list = LIST_HEAD_INIT(vpecontrol.tc_list)
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};
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+#ifdef CONFIG_IFX_VPE_EXT
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+unsigned int vpe1_load_addr;
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+
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+static int __init load_address(char *str)
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+{
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+ get_option(&str, &vpe1_load_addr);
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+ return 1;
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+}
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+__setup("vpe1_load_addr=", load_address);
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+
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+static unsigned int vpe1_mem;
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+static int __init vpe1mem(char *str)
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+{
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+ vpe1_mem = memparse(str, &str);
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+ return 1;
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+}
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+__setup("vpe1_mem=", vpe1mem);
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+
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+uint32_t vpe1_get_load_addr(uint32_t flags)
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+{
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+ return vpe1_load_addr;
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+}
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+EXPORT_SYMBOL(vpe1_get_load_addr);
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+
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+uint32_t vpe1_get_max_mem(uint32_t flags)
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+{
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+ if (!vpe1_mem)
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+ return P_SIZE;
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+ else
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+ return vpe1_mem;
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+}
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+EXPORT_SYMBOL(vpe1_get_max_mem);
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+
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+#endif
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+
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/* get the vpe associated with this minor */
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struct vpe *get_vpe(int minor)
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{
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--- a/arch/mips/lantiq/prom.c
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+++ b/arch/mips/lantiq/prom.c
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@@ -28,10 +28,14 @@ EXPORT_SYMBOL_GPL(ebu_lock);
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*/
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static struct ltq_soc_info soc_info;
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+/* for Multithreading (APRP), vpe.c will use it */
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+unsigned long cp0_memsize;
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+
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const char *get_system_type(void)
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{
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return soc_info.sys_type;
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}
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+EXPORT_SYMBOL(ltq_soc_type);
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int ltq_soc_type(void)
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{
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