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aee917a5a2
Starting with 4.14, the "amcc,dwc-otg" needs to be used
in order to get the usb-otg to work.
Signed-off-by: Christian Lamparter <chunkeey@gmail.com>
(cherry picked from commit 12b80f1cab)
471 lines
13 KiB
Plaintext
471 lines
13 KiB
Plaintext
/*
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* Device Tree for Bluestone (APM821xx) board.
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*
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* Copyright (c) 2010, Applied Micro Circuits Corporation
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* Author: Tirumala R Marri <tmarri@apm.com>
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*
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* This program is free software; you can redistribute it and/or
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* modify it under the terms of the GNU General Public License as
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* published by the Free Software Foundation; either version 2 of
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* the License, or (at your option) any later version.
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*
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* This program is distributed in the hope that it will be useful,
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* but WITHOUT ANY WARRANTY; without even the implied warranty of
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* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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* GNU General Public License for more details.
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*
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* You should have received a copy of the GNU General Public License
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* along with this program; if not, write to the Free Software
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* Foundation, Inc., 59 Temple Place, Suite 330, Boston,
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* MA 02111-1307 USA
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*
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*/
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/interrupt-controller/irq.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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#address-cells = <2>;
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#size-cells = <1>;
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dcr-parent = <&{/cpus/cpu@0}>;
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compatible = "apm,bluestone";
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aliases {
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ethernet0 = &EMAC0;
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};
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cpus {
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#address-cells = <1>;
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#size-cells = <0>;
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CPU00: cpu@0 {
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device_type = "cpu";
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model = "PowerPC,apm82181";
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reg = <0x00000000>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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timebase-frequency = <0>; /* Filled in by U-Boot */
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i-cache-line-size = <32>;
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d-cache-line-size = <32>;
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i-cache-size = <32768>;
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d-cache-size = <32768>;
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dcr-controller;
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dcr-access-method = "native";
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next-level-cache = <&L2C0>;
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};
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};
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memory {
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device_type = "memory";
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reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
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};
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UIC0: interrupt-controller0 {
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compatible = "apm,uic-apm82181","ibm,uic";
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interrupt-controller;
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cell-index = <0>;
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dcr-reg = <0x0c0 0x009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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};
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UIC1: interrupt-controller1 {
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compatible = "apm,uic-apm82181","ibm,uic";
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interrupt-controller;
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cell-index = <1>;
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dcr-reg = <0x0d0 0x009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x1e IRQ_TYPE_LEVEL_HIGH
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0x1f IRQ_TYPE_LEVEL_HIGH>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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UIC2: interrupt-controller2 {
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compatible = "apm,uic-apm82181","ibm,uic";
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interrupt-controller;
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cell-index = <2>;
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dcr-reg = <0x0e0 0x009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x0a IRQ_TYPE_LEVEL_HIGH
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0x0b IRQ_TYPE_LEVEL_HIGH>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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UIC3: interrupt-controller3 {
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compatible = "apm,uic-apm82181","ibm,uic";
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interrupt-controller;
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cell-index = <3>;
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dcr-reg = <0x0f0 0x009>;
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#address-cells = <0>;
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#size-cells = <0>;
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#interrupt-cells = <2>;
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interrupts = <0x10 IRQ_TYPE_LEVEL_HIGH
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0x11 IRQ_TYPE_LEVEL_HIGH>; /* cascade */
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interrupt-parent = <&UIC0>;
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};
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OCM1: ocm@400040000 {
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compatible = "apm,ocm-apm82181", "ibm,ocm";
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status = "okay";
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cell-index = <1>;
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/* configured in U-Boot */
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reg = <4 0x00040000 0x8000>; /* 32K */
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};
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SDR0: sdr {
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compatible = "apm,sdr-apm82181", "ibm,sdr-460ex";
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dcr-reg = <0x00e 0x002>;
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};
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CPR0: cpr {
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compatible = "apm,cpr-apm82181", "ibm,cpr-460ex";
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dcr-reg = <0x00c 0x002>;
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};
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L2C0: l2c {
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compatible = "ibm,l2-cache-apm82181", "ibm,l2-cache";
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dcr-reg = <0x020 0x008
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0x030 0x008>;
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cache-line-size = <32>;
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cache-size = <262144>;
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interrupt-parent = <&UIC1>;
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interrupts = <0x0b IRQ_TYPE_EDGE_RISING>;
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};
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CPM0: cpm {
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compatible = "ibm,cpm-apm821xx", "ibm,cpm";
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cell-index = <0>;
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dcr-reg = <0x160 0x003>;
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pm-cpu = <0x02000000>;
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pm-doze = <0x302570F0>;
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pm-nap = <0x302570F0>;
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pm-deepsleep = <0x302570F0>;
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pm-iic-device = <&IIC0>;
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pm-emac-device = <&EMAC0>;
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unused-units = <0x00000100>;
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idle-doze = <0x02000000>;
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standby = <0xfeff791d>;
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};
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plb {
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compatible = "apm,plb-apm82181", "ibm,plb-460ex", "ibm,plb4";
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#address-cells = <2>;
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#size-cells = <1>;
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ranges;
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clock-frequency = <0>; /* Filled in by U-Boot */
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SDRAM0: sdram {
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compatible = "apm,sdram-apm82181", "ibm,sdram-460ex", "ibm,sdram-405gp";
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dcr-reg = <0x010 0x002>;
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};
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RTC: rtc {
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compatible = "ibm,rtc";
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dcr-reg = <0x240 0x009>;
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interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&UIC2>;
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};
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CRYPTO: crypto@180000 {
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compatible = "amcc,ppc460ex-crypto", "amcc,ppc4xx-crypto";
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reg = <4 0x00180000 0x80400>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x1d IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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PKA: pka@114000 {
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device_type = "pka";
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compatible = "ppc4xx-pka", "amcc,ppc4xx-pka", "amcc, ppc4xx-pka";
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reg = <4 0x00114000 0x4000>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x14 IRQ_TYPE_EDGE_RISING>;
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status = "disabled";
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};
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TRNG: trng@110000 {
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device_type = "trng";
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compatible = "amcc,ppc460ex-rng", "ppc4xx-rng", "amcc, ppc4xx-trng";
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reg = <4 0x00110000 0x100>;
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interrupt-parent = <&UIC1>;
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interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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MAL0: mcmal {
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compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
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descriptor-memory = "ocm";
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dcr-reg = <0x180 0x062>;
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num-tx-chans = <1>;
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num-rx-chans = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-parent = <&UIC2>;
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interrupts = < 0x06 IRQ_TYPE_LEVEL_HIGH /*TXEOB*/
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0x07 IRQ_TYPE_LEVEL_HIGH /*RXEOB*/
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0x03 IRQ_TYPE_LEVEL_HIGH /*SERR*/
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0x04 IRQ_TYPE_LEVEL_HIGH /*TXDE*/
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0x05 IRQ_TYPE_LEVEL_HIGH /*RXDE*/
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0x08 IRQ_TYPE_EDGE_FALLING /*TX0 COAL*/
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/*0x09 IRQ_TYPE_EDGE_FALLING TX1 COAL*/
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0x0c IRQ_TYPE_EDGE_FALLING /*RX0 COAL*/
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/*0x0d IRQ_TYPE_EDGE_FALLING RX1 COAL*/>;
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};
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AHBDMA0: dma@bffd0800 {
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compatible = "snps,dma-spear1340";
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reg = <4 0xbffd0800 0x400>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x19 IRQ_TYPE_LEVEL_HIGH>;
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#dma-cells = <3>;
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/* use autoconfiguration for the dma setup */
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};
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SATA0: sata@bffd1000 {
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compatible = "amcc,sata-460ex";
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reg = <4 0xbffd1000 0x800>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x1a IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&AHBDMA0 0 0 1>;
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dma-names = "sata-dma";
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status = "disabled";
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};
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SATA1: sata@bffd1800 {
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compatible = "amcc,sata-460ex";
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reg = <4 0xbffd1800 0x800>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x1b IRQ_TYPE_LEVEL_HIGH>;
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dmas = <&AHBDMA0 1 0 2>;
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dma-names = "sata-dma";
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status = "disabled";
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};
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USBOTG0: usbotg@bff80000 {
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compatible = "amcc,dwc-otg";
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reg = <4 0xbff80000 0x10000>;
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interrupt-parent = <&USBOTG0>;
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interrupts = <0 1 2>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = <0 &UIC2 0x1c IRQ_TYPE_LEVEL_HIGH /* USB-OTG */
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1 &UIC1 0x1a IRQ_TYPE_LEVEL_LOW /* HIGH-POWER */
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2 &UIC0 0x0c IRQ_TYPE_LEVEL_HIGH /* DMA */>;
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dr_mode = "host";
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status = "disabled";
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};
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POB0: opb {
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compatible = "ibm,opb-460ex", "ibm,opb";
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#address-cells = <1>;
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#size-cells = <1>;
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ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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EBC0: ebc {
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compatible = "ibm,ebc-460ex", "ibm,ebc";
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dcr-reg = <0x012 0x002>;
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#address-cells = <2>;
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#size-cells = <1>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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/* ranges property is supplied by U-Boot */
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ranges = <0x00000003 0x00000000 0xe0000000 0x8000000>;
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interrupts = <0x06 IRQ_TYPE_LEVEL_HIGH>;
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interrupt-parent = <&UIC1>;
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nor_flash@0,0 {
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compatible = "cfi-flash";
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bank-width = <1>;
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reg = <0x00000000 0x00000000 0x00100000>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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};
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ndfc@1,0 {
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compatible = "ibm,ndfc";
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reg = <00000003 00000000 00002000>;
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ccr = <0x00001000>;
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bank-settings = <0x80002222>;
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#address-cells = <1>;
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#size-cells = <1>;
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status = "disabled";
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nand {
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#address-cells = <1>;
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#size-cells = <1>;
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};
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};
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};
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UART0: serial@ef600300 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600300 0x00000008>;
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virtual-reg = <0xef600300>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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current-speed = <0>; /* Filled in by U-Boot */
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interrupt-parent = <&UIC1>;
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interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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UART1: serial@ef600400 {
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device_type = "serial";
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compatible = "ns16550";
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reg = <0xef600400 0x00000008>;
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virtual-reg = <0xef600400>;
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clock-frequency = <0>; /* Filled in by U-Boot */
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current-speed = <0>; /* Filled in by U-Boot */
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interrupt-parent = <&UIC0>;
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interrupts = <0x01 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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GPIO0: gpio@ef600b00 {
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compatible = "ibm,ppc4xx-gpio";
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reg = <0xef600b00 0x00000048>;
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#gpio-cells = <2>;
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gpio-controller;
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status = "disabled";
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};
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IIC0: i2c@ef600700 {
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compatible = "ibm,iic-460ex", "ibm,iic";
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reg = <0xef600700 0x00000014>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x02 IRQ_TYPE_LEVEL_HIGH>;
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#address-cells = <1>;
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#size-cells = <0>;
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status = "disabled";
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};
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IIC1: i2c@ef600800 {
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compatible = "ibm,iic-460ex", "ibm,iic";
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reg = <0xef600800 0x00000014>;
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interrupt-parent = <&UIC0>;
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interrupts = <0x03 IRQ_TYPE_LEVEL_HIGH>;
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status = "disabled";
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};
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RGMII0: emac-rgmii@ef601500 {
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compatible = "ibm,rgmii-405ex", "ibm,rgmii";
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reg = <0xef601500 0x00000008>;
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has-mdio;
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};
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TAH0: emac-tah@ef601350 {
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compatible = "ibm,tah-460ex", "ibm,tah";
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reg = <0xef601350 0x00000030>;
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};
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EMAC0: ethernet@ef600c00 {
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device_type = "network";
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compatible = "ibm,emac-apm821xx", "ibm,emac4sync";
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interrupt-parent = <&EMAC0>;
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interrupts = <0 1>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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interrupt-map = <0 &UIC2 0x10 IRQ_TYPE_LEVEL_HIGH /* Status */
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1 &UIC2 0x14 IRQ_TYPE_LEVEL_HIGH /* Wake */>;
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reg = <0xef600c00 0x000000c4>;
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local-mac-address = [000000000000]; /* Filled in by U-Boot */
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mal-device = <&MAL0>;
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mal-tx-channel = <0>;
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mal-rx-channel = <0>;
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cell-index = <0>;
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max-frame-size = <9000>;
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rx-fifo-size = <16384>;
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tx-fifo-size = <2048>;
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fifo-entry-size = <10>;
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phy-mode = "rgmii";
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phy-map = <0x00000000>;
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rgmii-device = <&RGMII0>;
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rgmii-channel = <0>;
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tah-device = <&TAH0>;
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tah-channel = <0>;
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has-inverted-stacr-oc;
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has-new-stacr-staopc;
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status = "disabled";
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};
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};
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PCIE0: pciex@d00000000 {
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device_type = "pci";
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#interrupt-cells = <1>;
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#size-cells = <2>;
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#address-cells = <3>;
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compatible = "ibm,plb-pciex-apm821xx", "ibm,plb-pciex";
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primary;
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port = <0x0>; /* port number */
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reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
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0x0000000c 0x08010000 0x00001000>; /* Registers */
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dcr-reg = <0x100 0x020>;
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sdr-base = <0x300>;
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/* Outbound ranges, one memory and one IO,
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* later cannot be changed
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*/
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ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
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0x02000000 0x00000000 0x00000000 0x0000000f 0x00000000 0x00000000 0x00100000
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0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
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/* Inbound 2GB range starting at 0 */
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dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
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/* This drives busses 0x40 to 0x7f */
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bus-range = <0x40 0x7f>;
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/* Legacy interrupts (note the weird polarity, the bridge seems
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* to invert PCIe legacy interrupts).
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* We are de-swizzling here because the numbers are actually for
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* port of the root complex virtual P2P bridge. But I want
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* to avoid putting a node for it in the tree, so the numbers
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* below are basically de-swizzled numbers.
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* The real slot is on idsel 0, so the swizzling is 1:1
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*/
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interrupt-map-mask = <0x0 0x0 0x0 0x7>;
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interrupt-map = <
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0x0 0x0 0x0 0x1 &UIC3 0x0c IRQ_TYPE_LEVEL_HIGH /* swizzled int A */
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0x0 0x0 0x0 0x2 &UIC3 0x0d IRQ_TYPE_LEVEL_HIGH /* swizzled int B */
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0x0 0x0 0x0 0x3 &UIC3 0x0e IRQ_TYPE_LEVEL_HIGH /* swizzled int C */
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0x0 0x0 0x0 0x4 &UIC3 0x0f IRQ_TYPE_LEVEL_HIGH /* swizzled int D */>;
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status = "disabled";
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};
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MSI: ppc4xx-msi@C10000000 {
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compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
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reg = < 0xC 0x10000000 0x100
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0xC 0x10000000 0x100>;
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sdr-base = <0x36C>;
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msi-data = <0x00004440>;
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msi-mask = <0x0000ffe0>;
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interrupts =<0 1 2 3 4 5 6 7>;
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interrupt-parent = <&MSI>;
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#interrupt-cells = <1>;
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#address-cells = <0>;
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#size-cells = <0>;
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msi-available-ranges = <0x0 0x100>;
|
|
interrupt-map = <
|
|
0 &UIC3 0x18 IRQ_TYPE_EDGE_RISING
|
|
1 &UIC3 0x19 IRQ_TYPE_EDGE_RISING
|
|
2 &UIC3 0x1a IRQ_TYPE_EDGE_RISING
|
|
3 &UIC3 0x1b IRQ_TYPE_EDGE_RISING
|
|
4 &UIC3 0x1c IRQ_TYPE_EDGE_RISING
|
|
5 &UIC3 0x1d IRQ_TYPE_EDGE_RISING
|
|
6 &UIC3 0x1e IRQ_TYPE_EDGE_RISING
|
|
7 &UIC3 0x1f IRQ_TYPE_EDGE_RISING
|
|
>;
|
|
status = "disabled";
|
|
};
|
|
};
|
|
};
|