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d40756563c
Let's pick a bunch of useful phylink changes which allow us to keep drivers in sync with mainline Linux. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
77 lines
2.6 KiB
Diff
77 lines
2.6 KiB
Diff
From aa8b6bd2b1f235b262bd27f317a0516f196c2c6a Mon Sep 17 00:00:00 2001
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From: "Russell King (Oracle)" <rmk+kernel@armlinux.org.uk>
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Date: Tue, 23 May 2023 11:15:58 +0100
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Subject: [PATCH 18/21] net: phylink: add function to resolve clause 73
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negotiation
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Add a function to resolve clause 73 negotiation according to the
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priority resolution function described in clause 73.3.6.
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Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
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Reviewed-by: Andrew Lunn <andrew@lunn.ch>
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Signed-off-by: Jakub Kicinski <kuba@kernel.org>
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---
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drivers/net/phy/phylink.c | 39 +++++++++++++++++++++++++++++++++++++++
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include/linux/phylink.h | 2 ++
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2 files changed, 41 insertions(+)
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--- a/drivers/net/phy/phylink.c
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+++ b/drivers/net/phy/phylink.c
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@@ -3212,6 +3212,45 @@ static const struct sfp_upstream_ops sfp
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/* Helpers for MAC drivers */
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+static struct {
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+ int bit;
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+ int speed;
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+} phylink_c73_priority_resolution[] = {
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+ { ETHTOOL_LINK_MODE_100000baseCR4_Full_BIT, SPEED_100000 },
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+ { ETHTOOL_LINK_MODE_100000baseKR4_Full_BIT, SPEED_100000 },
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+ /* 100GBASE-KP4 and 100GBASE-CR10 not supported */
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+ { ETHTOOL_LINK_MODE_40000baseCR4_Full_BIT, SPEED_40000 },
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+ { ETHTOOL_LINK_MODE_40000baseKR4_Full_BIT, SPEED_40000 },
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+ { ETHTOOL_LINK_MODE_10000baseKR_Full_BIT, SPEED_10000 },
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+ { ETHTOOL_LINK_MODE_10000baseKX4_Full_BIT, SPEED_10000 },
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+ /* 5GBASE-KR not supported */
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+ { ETHTOOL_LINK_MODE_2500baseX_Full_BIT, SPEED_2500 },
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+ { ETHTOOL_LINK_MODE_1000baseKX_Full_BIT, SPEED_1000 },
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+};
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+
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+void phylink_resolve_c73(struct phylink_link_state *state)
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+{
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+ int i;
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+
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+ for (i = 0; i < ARRAY_SIZE(phylink_c73_priority_resolution); i++) {
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+ int bit = phylink_c73_priority_resolution[i].bit;
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+ if (linkmode_test_bit(bit, state->advertising) &&
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+ linkmode_test_bit(bit, state->lp_advertising))
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+ break;
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+ }
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+
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+ if (i < ARRAY_SIZE(phylink_c73_priority_resolution)) {
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+ state->speed = phylink_c73_priority_resolution[i].speed;
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+ state->duplex = DUPLEX_FULL;
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+ } else {
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+ /* negotiation failure */
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+ state->link = false;
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+ }
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+
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+ phylink_resolve_an_pause(state);
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+}
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+EXPORT_SYMBOL_GPL(phylink_resolve_c73);
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+
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static void phylink_decode_c37_word(struct phylink_link_state *state,
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uint16_t config_reg, int speed)
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{
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--- a/include/linux/phylink.h
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+++ b/include/linux/phylink.h
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@@ -656,6 +656,8 @@ int phylink_mii_c22_pcs_config(struct md
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const unsigned long *advertising);
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void phylink_mii_c22_pcs_an_restart(struct mdio_device *pcs);
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+void phylink_resolve_c73(struct phylink_link_state *state);
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+
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void phylink_mii_c45_pcs_get_state(struct mdio_device *pcs,
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struct phylink_link_state *state);
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