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https://github.com/openwrt/openwrt.git
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83fb9ec5e0
Signed-off-by: John Crispin <john@phrozen.org>
32 lines
1.2 KiB
Diff
32 lines
1.2 KiB
Diff
Index: linux-4.14.42/arch/mips/ath79/common.c
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===================================================================
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--- linux-4.14.42.orig/arch/mips/ath79/common.c
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+++ linux-4.14.42/arch/mips/ath79/common.c
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@@ -34,11 +34,13 @@ EXPORT_SYMBOL_GPL(ath79_ddr_freq);
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enum ath79_soc_type ath79_soc;
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unsigned int ath79_soc_rev;
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+EXPORT_SYMBOL_GPL(ath79_soc_rev);
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void __iomem *ath79_pll_base;
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void __iomem *ath79_reset_base;
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EXPORT_SYMBOL_GPL(ath79_reset_base);
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-static void __iomem *ath79_ddr_base;
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+void __iomem *ath79_ddr_base;
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+EXPORT_SYMBOL_GPL(ath79_ddr_base);
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static void __iomem *ath79_ddr_wb_flush_base;
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static void __iomem *ath79_ddr_pci_win_base;
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Index: linux-4.14.42/arch/mips/include/asm/mach-ath79/ath79.h
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===================================================================
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--- linux-4.14.42.orig/arch/mips/include/asm/mach-ath79/ath79.h
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+++ linux-4.14.42/arch/mips/include/asm/mach-ath79/ath79.h
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@@ -152,6 +152,7 @@ void ath79_ddr_wb_flush(unsigned int reg
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void ath79_ddr_set_pci_windows(void);
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extern void __iomem *ath79_pll_base;
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+extern void __iomem *ath79_ddr_base;
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extern void __iomem *ath79_reset_base;
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static inline void ath79_pll_wr(unsigned reg, u32 val)
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