openwrt/target/linux/bcm53xx/patches-4.14/035-v4.21-0006-ARM-dts-BCM5301X-Describe-Northstar-pins-mux-control.patch
Petr Štetiar 1d94f72439 kernel: bump 4.14 to 4.14.258
Rebased patches:

 * generic: 273-batman-adv-Convert-packet.h-to-uapi-header.patch
 * ipq806x: 0065-arm-override-compiler-flags.patch
 * mvebu: 513-arm64-dts-marvell-armada37xx-Add-emmc-sdio-pinctrl-d.patch

Removed patches:

 Fixed upstream:

   * ar71xx: 821-serial-core-add-support-for-boot-console-with-arbitr.patch
   * ath79: 921-serial-core-add-support-for-boot-console-with-arbitr.patch
     - in 4.14.256 via 9112e7ef87149b3d8093e7446d784117f6e18d69

   * mvebu: 527-PCI-aardvark-allow-to-specify-link-capability.patch
     - in 4.14.257 via 62a3dc9b65a2b24800fc4267b8cf590fad135034

   * mvebu: 524-PCI-aardvark-set-host-and-device-to-the-same-MAX-payload-size.patch
     - should be hopefully fixed by the bunch of changes in .256 and .257

Run tested on ipq40xx/glinet-b1300 and mvebu/turris-omnia.

Fixes: CVE-2021-3640
Signed-off-by: Petr Štetiar <ynezz@true.cz>
2021-12-19 08:23:23 +01:00

78 lines
1.9 KiB
Diff

From 9994241ac97cb84d1df98fdc172d3cc6b04b11bf Mon Sep 17 00:00:00 2001
From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
Date: Fri, 9 Nov 2018 09:56:49 +0100
Subject: [PATCH] ARM: dts: BCM5301X: Describe Northstar pins mux controller
MIME-Version: 1.0
Content-Type: text/plain; charset=UTF-8
Content-Transfer-Encoding: 8bit
This describes hardware & will allow referencing pin functions. The
first usage is UART1 which allows supporting devices using it.
Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
---
arch/arm/boot/dts/bcm5301x.dtsi | 44 +++++++++++++++++++++++++++++++++++++++++
1 file changed, 44 insertions(+)
--- a/arch/arm/boot/dts/bcm5301x.dtsi
+++ b/arch/arm/boot/dts/bcm5301x.dtsi
@@ -37,6 +37,8 @@
reg = <0x0400 0x100>;
interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
clocks = <&iprocslow>;
+ pinctrl-names = "default";
+ pinctrl-0 = <&pinmux_uart1>;
status = "disabled";
};
};
@@ -393,6 +395,48 @@
status = "disabled";
};
+ dmu@1800c000 {
+ compatible = "simple-bus";
+ ranges = <0 0x1800c000 0x1000>;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ cru@100 {
+ compatible = "simple-bus";
+ reg = <0x100 0x1a4>;
+ ranges;
+ #address-cells = <1>;
+ #size-cells = <1>;
+
+ pin-controller@1c0 {
+ compatible = "brcm,bcm4708-pinmux";
+ reg = <0x1c0 0x24>;
+ reg-names = "cru_gpio_control";
+
+ spi-pins {
+ groups = "spi_grp";
+ function = "spi";
+ };
+
+ i2c {
+ groups = "i2c_grp";
+ function = "i2c";
+ };
+
+ pwm {
+ groups = "pwm0_grp", "pwm1_grp",
+ "pwm2_grp", "pwm3_grp";
+ function = "pwm";
+ };
+
+ pinmux_uart1: uart1 {
+ groups = "uart1_grp";
+ function = "uart1";
+ };
+ };
+ };
+ };
+
lcpll0: lcpll0@1800c100 {
#clock-cells = <1>;
compatible = "brcm,nsp-lcpll0";