Petr Štetiar 12758b6906 sunxi: cortexa7: fix ethernet link detection on a20-olinuxino-lime2 ... a20-olinuxino-lime2 is currently having hard time with link detection of certain 1000Mbit partners due to usage of generic PHY driver, probably due to following missing workaround introduced in upstream in commit 3aed3e2a143c ("net: phy: micrel: add Asym Pause workaround"): The Micrel KSZ9031 PHY may fail to establish a link when the Asymmetric Pause capability is set. This issue is described in a Silicon Errata (DS80000691D or DS80000692D), which advises to always disable the capability. This patch implements the workaround by defining a KSZ9031 specific get_feature callback to force the Asymmetric Pause capability bit to be cleared. This fixes issues where the link would not come up at boot time, or when the Asym Pause bit was set later on. As a20-olinuxino-lime2 has Micrel KSZ9031RNXCC-TR Gigabit PHY since revision H, so we need to use Micrel PHY driver on those devices. Signed-off-by: Petr Štetiar <ynezz@true.cz> (cherry picked from commit ffa1088f63)		2022-03-24 08:18:46 +01:00
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config-5.10	sunxi: cortexa7: fix ethernet link detection on a20-olinuxino-lime2	2022-03-24 08:18:46 +01:00
target.mk	target: use SPDX license identifiers on Makefiles	2021-02-10 15:47:18 +01:00