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e3a1e78cd8
It compiles but *doesn't* boot so it isn't enabled yet. Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
42 lines
1.1 KiB
Diff
42 lines
1.1 KiB
Diff
From 1b88c6ed26a1aa1d68d1661404e6e939709ff530 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <rafal@milecki.pl>
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Date: Thu, 10 Dec 2020 08:21:54 +0100
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Subject: [PATCH 4/4] arm64: dts: broadcom: bcm4908: describe PCIe reset
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controller
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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This reset controller is a single register in the Broadcom's MISC block.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi | 15 +++++++++++++++
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1 file changed, 15 insertions(+)
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--- a/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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+++ b/arch/arm64/boot/dts/broadcom/bcm4908/bcm4908.dtsi
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@@ -177,6 +177,21 @@
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};
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};
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+ misc@2600 {
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+ compatible = "brcm,misc", "simple-mfd";
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+ reg = <0x2600 0xe4>;
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+
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges = <0x00 0x2600 0xe4>;
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+
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+ reset-controller@2644 {
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+ compatible = "brcm,bcm4908-misc-pcie-reset";
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+ reg = <0x44 0x04>;
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+ #reset-cells = <1>;
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+ };
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+ };
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+
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reboot {
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compatible = "syscon-reboot";
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regmap = <&timer>;
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