mirror of
https://github.com/openwrt/openwrt.git
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1e6c6a36f5
Changelog: https://cdn.kernel.org/pub/linux/kernel/v6.x/ChangeLog-6.1.68 Removed upstreamed: generic/backport-6.1/795-v6.6-12-r8152-Rename-RTL8152_UNPLUG-to-RTL8152_INACCESSIBLE.patch[1] Manually rebased: mediatek/patches-6.1/100-dts-update-mt7622-rfb1.patch All other patches automatically rebased. 1. https://git.kernel.org/pub/scm/linux/kernel/git/stable/linux.git/commit/?h=v6.1.68&id=3759e735562a31e44fee825498f05c06e64b25a8 Build system: x86/64 Build-tested: x86/64/AMD Cezanne Run-tested: x86/64/AMD Cezanne Signed-off-by: John Audia <therealgraysky@proton.me>
108 lines
2.0 KiB
Diff
108 lines
2.0 KiB
Diff
--- a/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
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+++ b/arch/arm64/boot/dts/mediatek/mt7622-rfb1.dts
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@@ -1,7 +1,6 @@
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/*
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- * Copyright (c) 2017 MediaTek Inc.
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- * Author: Ming Huang <ming.huang@mediatek.com>
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- * Sean Wang <sean.wang@mediatek.com>
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+ * Copyright (c) 2018 MediaTek Inc.
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+ * Author: Ryder Lee <ryder.lee@mediatek.com>
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*
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* SPDX-License-Identifier: (GPL-2.0 OR MIT)
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*/
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@@ -24,7 +23,7 @@
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chosen {
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stdout-path = "serial0:115200n8";
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- bootargs = "earlycon=uart8250,mmio32,0x11002000 swiotlb=512";
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+ bootargs = "earlycon=uart8250,mmio32,0x11002000 console=ttyS0,115200n1 swiotlb=512";
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};
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cpus {
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@@ -45,18 +44,18 @@
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key-factory {
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label = "factory";
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linux,code = <BTN_0>;
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- gpios = <&pio 0 0>;
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+ gpios = <&pio 0 GPIO_ACTIVE_LOW>;
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};
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key-wps {
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label = "wps";
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linux,code = <KEY_WPS_BUTTON>;
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- gpios = <&pio 102 0>;
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+ gpios = <&pio 102 GPIO_ACTIVE_LOW>;
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};
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};
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memory@40000000 {
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- reg = <0 0x40000000 0 0x20000000>;
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+ reg = <0 0x40000000 0 0x40000000>;
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};
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reg_1p8v: regulator-1p8v {
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@@ -132,22 +131,22 @@
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port@0 {
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reg = <0>;
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- label = "lan0";
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+ label = "lan1";
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};
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port@1 {
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reg = <1>;
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- label = "lan1";
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+ label = "lan2";
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};
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port@2 {
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reg = <2>;
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- label = "lan2";
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+ label = "lan3";
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};
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port@3 {
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reg = <3>;
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- label = "lan3";
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+ label = "lan4";
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};
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port@4 {
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@@ -240,7 +239,22 @@
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status = "okay";
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};
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+&pcie1 {
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+ pinctrl-names = "default";
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+ pinctrl-0 = <&pcie1_pins>;
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+ status = "okay";
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+};
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+
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&pio {
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+ /* Attention: GPIO 90 is used to switch between PCIe@1,0 and
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+ * SATA functions. i.e. output-high: PCIe, output-low: SATA
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+ */
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+ asm_sel {
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+ gpio-hog;
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+ gpios = <90 GPIO_ACTIVE_HIGH>;
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+ output-high;
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+ };
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+
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/* eMMC is shared pin with parallel NAND */
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emmc_pins_default: emmc-pins-default {
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mux {
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@@ -517,11 +531,11 @@
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};
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&sata {
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- status = "okay";
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+ status = "disabled";
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};
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&sata_phy {
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- status = "okay";
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+ status = "disabled";
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};
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&spi0 {
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