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659f4a13dd
With Linux 6.1 many of our downstream patches and out-of-tree files can be removed or at least replaced by backported upstream commits. Signed-off-by: Daniel Golle <daniel@makrotopia.org> [fix CMDLINE_OVERRIDE for arm64] Signed-off-by: Bjørn Mork <bjorn@mork.no>
161 lines
4.1 KiB
Diff
161 lines
4.1 KiB
Diff
From c1744e9e75a6a8abc7c893f349bcbf725b9c0d74 Mon Sep 17 00:00:00 2001
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From: Sam Shih <sam.shih@mediatek.com>
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Date: Fri, 6 Jan 2023 16:28:43 +0100
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Subject: [PATCH 08/19] arm64: dts: mt7986: add mmc related device nodes
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This patch adds mmc support for MT7986.
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Signed-off-by: Sam Shih <sam.shih@mediatek.com>
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Signed-off-by: Frank Wunderlich <frank-w@public-files.de>
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Link: https://lore.kernel.org/r/20230106152845.88717-4-linux@fw-web.de
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Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
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---
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arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts | 96 ++++++++++++++++++++
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arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 15 +++
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2 files changed, 111 insertions(+)
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--- a/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
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+++ b/arch/arm64/boot/dts/mediatek/mt7986a-rfb.dts
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@@ -5,6 +5,8 @@
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*/
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/dts-v1/;
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+#include <dt-bindings/pinctrl/mt65xx.h>
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+
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#include "mt7986a.dtsi"
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/ {
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@@ -23,6 +25,24 @@
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device_type = "memory";
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reg = <0 0x40000000 0 0x40000000>;
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};
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+
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+ reg_1p8v: regulator-1p8v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "fixed-1.8V";
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+ regulator-min-microvolt = <1800000>;
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+ regulator-max-microvolt = <1800000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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+
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+ reg_3p3v: regulator-3p3v {
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+ compatible = "regulator-fixed";
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+ regulator-name = "fixed-3.3V";
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+ regulator-min-microvolt = <3300000>;
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+ regulator-max-microvolt = <3300000>;
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+ regulator-boot-on;
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+ regulator-always-on;
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+ };
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};
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&crypto {
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@@ -58,7 +78,83 @@
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};
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};
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+&mmc0 {
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+ pinctrl-names = "default", "state_uhs";
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+ pinctrl-0 = <&mmc0_pins_default>;
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+ pinctrl-1 = <&mmc0_pins_uhs>;
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+ bus-width = <8>;
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+ max-frequency = <200000000>;
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+ cap-mmc-highspeed;
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+ mmc-hs200-1_8v;
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+ mmc-hs400-1_8v;
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+ hs400-ds-delay = <0x14014>;
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+ vmmc-supply = <®_3p3v>;
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+ vqmmc-supply = <®_1p8v>;
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+ non-removable;
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+ no-sd;
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+ no-sdio;
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+ status = "okay";
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+};
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+
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&pio {
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+ mmc0_pins_default: mmc0-pins {
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+ mux {
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+ function = "emmc";
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+ groups = "emmc_51";
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+ };
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+ conf-cmd-dat {
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+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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+ input-enable;
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+ drive-strength = <4>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
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+ };
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+ conf-clk {
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+ pins = "EMMC_CK";
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+ drive-strength = <6>;
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
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+ };
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+ conf-ds {
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+ pins = "EMMC_DSL";
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
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+ };
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+ conf-rst {
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+ pins = "EMMC_RSTB";
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+ drive-strength = <4>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
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+ };
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+ };
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+
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+ mmc0_pins_uhs: mmc0-uhs-pins {
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+ mux {
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+ function = "emmc";
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+ groups = "emmc_51";
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+ };
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+ conf-cmd-dat {
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+ pins = "EMMC_DATA_0", "EMMC_DATA_1", "EMMC_DATA_2",
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+ "EMMC_DATA_3", "EMMC_DATA_4", "EMMC_DATA_5",
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+ "EMMC_DATA_6", "EMMC_DATA_7", "EMMC_CMD";
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+ input-enable;
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+ drive-strength = <4>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
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+ };
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+ conf-clk {
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+ pins = "EMMC_CK";
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+ drive-strength = <6>;
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
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+ };
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+ conf-ds {
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+ pins = "EMMC_DSL";
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+ bias-pull-down = <MTK_PUPD_SET_R1R0_10>; /* pull-down 50K */
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+ };
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+ conf-rst {
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+ pins = "EMMC_RSTB";
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+ drive-strength = <4>;
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+ bias-pull-up = <MTK_PUPD_SET_R1R0_01>; /* pull-up 10K */
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+ };
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+ };
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+
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spi_flash_pins: spi-flash-pins {
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mux {
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function = "spi";
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--- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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+++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi
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@@ -345,6 +345,21 @@
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status = "disabled";
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};
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+ mmc0: mmc@11230000 {
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+ compatible = "mediatek,mt7986-mmc";
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+ reg = <0 0x11230000 0 0x1000>,
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+ <0 0x11c20000 0 0x1000>;
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+ interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>,
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+ <&infracfg CLK_INFRA_MSDC_HCK_CK>,
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+ <&infracfg CLK_INFRA_MSDC_CK>,
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+ <&infracfg CLK_INFRA_MSDC_133M_CK>,
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+ <&infracfg CLK_INFRA_MSDC_66M_CK>;
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+ clock-names = "source", "hclk", "source_cg", "bus_clk",
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+ "sys_cg";
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+ status = "disabled";
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+ };
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+
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usb_phy: t-phy@11e10000 {
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compatible = "mediatek,mt7986-tphy",
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"mediatek,generic-tphy-v2";
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