mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-21 06:33:41 +00:00
ee6ba216d8
Fix FDB learning bugs when VLAN filtering is enabled. Signed-off-by: DENG Qingfang <dqfext@gmail.com> Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
66 lines
2.0 KiB
Diff
66 lines
2.0 KiB
Diff
From ba2203f36b981235556504fb7b62baee28512a40 Mon Sep 17 00:00:00 2001
|
|
From: DENG Qingfang <dqfext@gmail.com>
|
|
Date: Tue, 24 Aug 2021 11:37:50 +0800
|
|
Subject: [PATCH] net: dsa: mt7530: disable learning on standalone ports
|
|
|
|
This is a partial backport of commit 5a30833b9a16f8d1aa15de06636f9317ca51f9df
|
|
("net: dsa: mt7530: support MDB and bridge flag operations") upstream.
|
|
|
|
Make sure that the standalone ports start up with learning disabled.
|
|
|
|
Signed-off-by: DENG Qingfang <dqfext@gmail.com>
|
|
---
|
|
drivers/net/dsa/mt7530.c | 16 ++++++++++++++--
|
|
1 file changed, 14 insertions(+), 2 deletions(-)
|
|
|
|
--- a/drivers/net/dsa/mt7530.c
|
|
+++ b/drivers/net/dsa/mt7530.c
|
|
@@ -1163,6 +1163,8 @@ mt7530_port_bridge_join(struct dsa_switc
|
|
PCR_MATRIX_MASK, PCR_MATRIX(port_bitmap));
|
|
priv->ports[port].pm |= PCR_MATRIX(port_bitmap);
|
|
|
|
+ mt7530_clear(priv, MT7530_PSC_P(port), SA_DIS);
|
|
+
|
|
mutex_unlock(&priv->reg_mutex);
|
|
|
|
return 0;
|
|
@@ -1260,6 +1262,8 @@ mt7530_port_bridge_leave(struct dsa_swit
|
|
PCR_MATRIX(BIT(MT7530_CPU_PORT)));
|
|
priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT));
|
|
|
|
+ mt7530_set(priv, MT7530_PSC_P(port), SA_DIS);
|
|
+
|
|
mutex_unlock(&priv->reg_mutex);
|
|
}
|
|
|
|
@@ -1817,9 +1821,13 @@ mt7530_setup(struct dsa_switch *ds)
|
|
ret = mt753x_cpu_port_enable(ds, i);
|
|
if (ret)
|
|
return ret;
|
|
- } else
|
|
+ } else {
|
|
mt7530_port_disable(ds, i);
|
|
|
|
+ /* Disable learning by default on all user ports */
|
|
+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);
|
|
+ }
|
|
+
|
|
/* Enable consistent egress tag */
|
|
mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
|
|
PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
|
|
@@ -1979,9 +1987,13 @@ mt7531_setup(struct dsa_switch *ds)
|
|
ret = mt753x_cpu_port_enable(ds, i);
|
|
if (ret)
|
|
return ret;
|
|
- } else
|
|
+ } else {
|
|
mt7530_port_disable(ds, i);
|
|
|
|
+ /* Disable learning by default on all user ports */
|
|
+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);
|
|
+ }
|
|
+
|
|
/* Enable consistent egress tag */
|
|
mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
|
|
PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
|