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7774b86019
Add the missing pinctrl properties on the ethernet node. GMAC1 will start working with this change. Link: https://lore.kernel.org/netdev/83a35aa3-6cb8-2bc4-2ff4-64278bbcd8c8@arinc9.com/ Overwrite pinctrl-0 property without rgmii2_pins on devicetrees which use the rgmii2 pins as GPIO (22 - 33). Give gpio function to rgmii2 pin group on mt7621_tplink_archer-x6-v3.dtsi which uses GPIO 28. Signed-off-by: Arınç ÜNAL <arinc.unal@arinc9.com>
204 lines
3.2 KiB
Plaintext
204 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "wavlink,wl-wn531a6", "mediatek,mt7621-soc";
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model = "Wavlink WL-WN531A6";
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aliases {
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led-boot = &led_status_red;
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led-failsafe = &led_status_red;
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led-running = &led_status_blue;
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led-upgrade = &led_status_red;
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset Button";
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gpios = <&gpio 18 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};
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touch { /* RH6015C touch sensor -> GPIO 14 */
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label = "Touch Button";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_0>;
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};
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turbo {
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label = "Turbo Button";
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gpios = <&gpio 25 GPIO_ACTIVE_LOW>;
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linux,code = <BTN_1>;
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};
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wps {
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label = "WPS Button";
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gpios = <&gpio 24 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_WPS_BUTTON>;
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};
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};
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leds {
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compatible = "gpio-leds";
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led_status_blue: status_blue {
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label = "blue:power";
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gpios = <&gpio 16 GPIO_ACTIVE_HIGH>;
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};
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led_status_red: status_red {
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label = "red:power";
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gpios = <&gpio 17 GPIO_ACTIVE_HIGH>;
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};
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wifi2g {
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label = "blue:wifi2g";
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gpios = <&gpio 23 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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};
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};
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&i2c {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <40000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "config";
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reg = <0x30000 0x10000>;
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read-only;
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};
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factory: partition@40000 {
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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};
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partition@50000 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x50000 0xeb0000>;
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};
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partition@f00000 {
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label = "vendor";
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reg = <0xf00000 0x100000>;
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read-only;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x0>;
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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&pcie1 {
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mt76@0,0 {
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compatible = "mediatek,mt76";
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reg = <0x0000 0 0 0 0>;
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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ðernet {
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pinctrl-0 = <&mdio_pins>, <&rgmii1_pins>;
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};
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&gmac0 {
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nvmem-cells = <&macaddr_factory_e000>;
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nvmem-cell-names = "mac-address";
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};
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&switch0 {
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ports {
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port@0 {
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status = "okay";
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label = "lan1";
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};
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port@1 {
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status = "okay";
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label = "lan2";
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};
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port@2 {
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status = "okay";
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label = "lan3";
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};
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port@3 {
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status = "okay";
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label = "lan4";
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};
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port@4 {
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status = "okay";
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label = "wan";
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nvmem-cells = <&macaddr_factory_e006>;
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nvmem-cell-names = "mac-address";
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};
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};
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};
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&state_default {
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gpio {
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groups = "rgmii2", "jtag", "wdt";
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function = "gpio";
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};
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};
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&uartlite2 {
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status = "okay";
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};
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&factory {
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compatible = "nvmem-cells";
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#address-cells = <1>;
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#size-cells = <1>;
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macaddr_factory_e000: macaddr@e000 {
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reg = <0xe000 0x6>;
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};
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macaddr_factory_e006: macaddr@e006 {
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reg = <0xe006 0x6>;
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};
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};
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