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265 lines
6.2 KiB
Diff
265 lines
6.2 KiB
Diff
From 21c29be6a69d3ef4f5a2e16272deb4845f8208ad Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Rafa=C5=82=20Mi=C5=82ecki?= <zajec5@gmail.com>
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Date: Tue, 23 Aug 2016 07:37:43 +0200
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Subject: [PATCH] ARM: BCM5301X: Add basic dts for BCM53573 based Tenda AC9
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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BCM53573 seems to be low priced alternative for Northstar chipsts. It
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uses single core Cortex-A7 and doesn't have SDU or local (TWD) timer. It
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was also stripped out of independent SPI controller and 2 GMACs.
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DTS for Tenda AC9 isn't completed yet. It misses e.g. switch entry (we
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still need some b53 fixes) and probably some clocks. It adds support for
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basic features however and can be improved later.
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Signed-off-by: Rafał Miłecki <rafal@milecki.pl>
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Signed-off-by: Florian Fainelli <f.fainelli@gmail.com>
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---
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arch/arm/boot/dts/Makefile | 2 +
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arch/arm/boot/dts/bcm47189-tenda-ac9.dts | 74 ++++++++++++++++
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arch/arm/boot/dts/bcm53573.dtsi | 147 +++++++++++++++++++++++++++++++
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3 files changed, 223 insertions(+)
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create mode 100644 arch/arm/boot/dts/bcm47189-tenda-ac9.dts
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create mode 100644 arch/arm/boot/dts/bcm53573.dtsi
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--- a/arch/arm/boot/dts/Makefile
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+++ b/arch/arm/boot/dts/Makefile
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@@ -82,6 +82,8 @@ dtb-$(CONFIG_ARCH_BCM_5301X) += \
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bcm94709.dtb \
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bcm953012er.dtb \
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bcm953012k.dtb
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+dtb-$(CONFIG_ARCH_BCM_53573) += \
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+ bcm47189-tenda-ac9.dtb
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dtb-$(CONFIG_ARCH_BCM_63XX) += \
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bcm963138dvt.dtb
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dtb-$(CONFIG_ARCH_BCM_CYGNUS) += \
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm47189-tenda-ac9.dts
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@@ -0,0 +1,74 @@
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+/*
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+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
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+ *
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+ * Licensed under the ISC license.
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+ */
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+
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+/dts-v1/;
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+
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+#include "bcm53573.dtsi"
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+
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+/ {
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+ compatible = "tenda,ac9", "brcm,bcm47189", "brcm,bcm53573";
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+ model = "Tenda AC9";
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+
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+ chosen {
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+ bootargs = "console=ttyS0,115200 earlycon";
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+ };
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+
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+ memory {
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+ reg = <0x00000000 0x08000000>;
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+ };
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+
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+ leds {
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+ compatible = "gpio-leds";
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+
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+ usb {
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+ label = "bcm53xx:blue:usb";
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+ gpios = <&chipcommon 1 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "default-off";
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+ };
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+
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+ wps {
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+ label = "bcm53xx:blue:wps";
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+ gpios = <&chipcommon 10 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "default-off";
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+ };
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+
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+ 5ghz {
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+ label = "bcm53xx:blue:5ghz";
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+ gpios = <&chipcommon 11 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "default-off";
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+ };
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+
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+ system {
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+ label = "bcm53xx:blue:system";
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+ gpios = <&chipcommon 15 GPIO_ACTIVE_HIGH>;
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+ linux,default-trigger = "timer";
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+ };
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+ };
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+
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+ gpio-keys {
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+ compatible = "gpio-keys";
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ rfkill {
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+ label = "WiFi";
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+ linux,code = <KEY_RFKILL>;
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+ gpios = <&chipcommon 3 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ restart {
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+ label = "Reset";
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+ linux,code = <KEY_RESTART>;
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+ gpios = <&chipcommon 7 GPIO_ACTIVE_LOW>;
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+ };
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+
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+ wps {
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+ label = "WPS";
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+ linux,code = <KEY_WPS_BUTTON>;
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+ gpios = <&chipcommon 9 GPIO_ACTIVE_LOW>;
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+ };
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+ };
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+};
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--- /dev/null
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+++ b/arch/arm/boot/dts/bcm53573.dtsi
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@@ -0,0 +1,147 @@
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+/*
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+ * Copyright (C) 2016 Rafał Miłecki <rafal@milecki.pl>
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+ *
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+ * Licensed under the ISC license.
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+ */
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+
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+#include <dt-bindings/gpio/gpio.h>
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+#include <dt-bindings/input/input.h>
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+#include <dt-bindings/interrupt-controller/irq.h>
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+#include <dt-bindings/interrupt-controller/arm-gic.h>
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+#include "skeleton.dtsi"
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+
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+/ {
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+ interrupt-parent = <&gic>;
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+
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+ chosen {
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+ stdout-path = &uart0;
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+ };
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+
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+ cpus {
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+ #address-cells = <1>;
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+ #size-cells = <0>;
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+
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+ cpu@0 {
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+ device_type = "cpu";
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+ compatible = "arm,cortex-a7";
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+ reg = <0x0>;
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+ };
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+ };
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+
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+ mpcore {
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+ compatible = "simple-bus";
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+ ranges = <0x00000000 0x18310000 0x00008000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ gic: interrupt-controller@1000 {
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+ compatible = "arm,cortex-a7-gic";
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+ #interrupt-cells = <3>;
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+ #address-cells = <0>;
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+ interrupt-controller;
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+ reg = <0x1000 0x1000>,
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+ <0x2000 0x0100>;
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+ };
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+ };
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+
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+ clocks {
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+ ranges;
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+
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+ alp: oscillator {
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+ #clock-cells = <0>;
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+ compatible = "fixed-clock";
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+ clock-frequency = <40000000>;
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+ };
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+ };
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+
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+ axi@18000000 {
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+ compatible = "brcm,bus-axi";
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+ reg = <0x18000000 0x1000>;
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+ ranges = <0x00000000 0x18000000 0x00100000>;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ #interrupt-cells = <1>;
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+ interrupt-map-mask = <0x000fffff 0xffff>;
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+ interrupt-map =
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+ /* ChipCommon */
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+ <0x00000000 0 &gic GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH>,
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+
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+ /* IEEE 802.11 0 */
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+ <0x00001000 0 &gic GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH>,
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+
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+ /* PCIe Controller 0 */
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+ <0x00002000 0 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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+ <0x00002000 1 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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+ <0x00002000 2 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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+ <0x00002000 3 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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+ <0x00002000 4 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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+ <0x00002000 5 &gic GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>,
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+
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+ /* USB 2.0 Controller */
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+ <0x00004000 0 &gic GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>,
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+
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+ /* Ethernet Controller 0 */
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+ <0x00005000 0 &gic GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>,
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+
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+ /* IEEE 802.11 1 */
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+ <0x0000a000 0 &gic GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>,
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+
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+ /* Ethernet Controller 1 */
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+ <0x0000b000 0 &gic GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
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+
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+ chipcommon: chipcommon@0 {
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+ compatible = "simple-bus";
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+ reg = <0x00000000 0x1000>;
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+ ranges;
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+
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ gpio-controller;
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+ #gpio-cells = <2>;
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+
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+ uart0: serial@0300 {
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+ compatible = "ns16550a";
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+ reg = <0x0300 0x100>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_PPI 16 IRQ_TYPE_LEVEL_HIGH>;
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+ clocks = <&alp>;
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+ status = "okay";
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+ };
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+ };
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+
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+ usb2: usb2@4000 {
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+ reg = <0x4000 0x1000>;
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+ ranges;
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+ #address-cells = <1>;
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+ #size-cells = <1>;
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+
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+ ehci: ehci@4000 {
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+ compatible = "generic-ehci";
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+ reg = <0x4000 0x1000>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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+
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+ ohci: ohci@d000 {
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+ #usb-cells = <0>;
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+
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+ compatible = "generic-ohci";
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+ reg = <0xd000 0x1000>;
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+ interrupt-parent = <&gic>;
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+ interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
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+ };
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+ };
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+
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+ gmac0: ethernet@5000 {
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+ reg = <0x5000 0x1000>;
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+ };
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+
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+ gmac1: ethernet@b000 {
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+ reg = <0xb000 0x1000>;
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+ };
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+ };
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+};
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