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5aca47bca1
BL100 is a router made by Bolt by a provider in Indonesia The original firmware created using Mediatek SDK and kernel 2.6.36 - Chipset: MediaTek MT7620A ver 2, eco 6 - RAM: 64 MB - Bootloader: U Boot - Flash: Winbond W25Q128BV (16 MB) - Ports: 2x 10/100 Ethernet, 1x RJ-11 VoIP - Modem: Qualcomm LTE B40 (2300 Mhz) VID:05c6 PID:9026 - Wireless: Internal MT7620A (2.4 Ghz) & Mediatek MT76x2E (5.8 Ghz) - Switch: MediaTek MT7620A built-in 5-port 10/100M switch - Voltage: DC 12V 1A - Antenna Port: 2x External Antenna, 2 LTE U.FL, 2 WiFi U.FL - Serial Port: Yes, 3.3 V TTL, Baud 57600 8N1 - Buttons: Reset and WPS - LED: 15 Total - 4 blue lte, 2 red lte, 1 reset, 1 power. - 1 wps, 1 voip, 1 wlan2, 1 wlan5, 1 lan, 1 wan, 1 wlan. Installation via stock firmware 1. Unlock Telnet access by downloading the backup .tar.gz file 2. Change the Telnet configuration to LAN_Telnet=1 3. Import backup configuration 4. Restart the router 5. Login to telnet with username and password = admin : db40 6. Download sysupgrade binary and mtd_write to the kernel partition `mtd_write write openwrt-bolt_bl100-squashfs-sysupgrade.bin Kernel` Signed-off-by: Radito Wahyu <arditogits@gmail.com>
263 lines
4.4 KiB
Plaintext
263 lines
4.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "mt7620a.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/leds/common.h>
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#include <dt-bindings/mtd/partitions/uimage.h>
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/ {
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compatible = "bolt,bl100", "ralink,mt7620a-soc";
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model = "Bolt BL100";
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aliases {
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led-boot = &led_reset;
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led-failsafe = &led_reset;
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led-running = &led_power;
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led-upgrade = &led_reset;
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label-mac-device = ðernet;
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};
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chosen {
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bootargs = "console=ttyS0,57600";
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};
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leds {
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compatible = "gpio-leds";
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led_reset: reset {
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function = LED_FUNCTION_BOOT;
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color = <LED_COLOR_ID_RED>;
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gpios = <&gpio1 8 GPIO_ACTIVE_LOW>;
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};
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led_power: power {
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function = LED_FUNCTION_POWER;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio1 9 GPIO_ACTIVE_LOW>;
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};
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led_lte1 {
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label = "blue:lte1";
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gpios = <&gpio1 7 GPIO_ACTIVE_LOW>;
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};
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led_lte2 {
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label = "blue:lte2";
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gpios = <&gpio1 6 GPIO_ACTIVE_LOW>;
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};
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led_lte3 {
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label = "blue:lte3";
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gpios = <&gpio1 10 GPIO_ACTIVE_LOW>;
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};
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led_lte4 {
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label = "blue:lte4";
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gpios = <&gpio1 11 GPIO_ACTIVE_LOW>;
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};
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led_lte5 {
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label = "red:lte5";
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gpios = <&gpio2 24 GPIO_ACTIVE_LOW>;
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};
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led_lte6 {
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label = "red:lte6";
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gpios = <&gpio2 25 GPIO_ACTIVE_LOW>;
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};
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led_wps {
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function = LED_FUNCTION_WPS;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio2 22 GPIO_ACTIVE_LOW>;
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};
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led_voip {
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label = "blue:voip";
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gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
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};
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led_wlan2 {
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function = LED_FUNCTION_WLAN_2GHZ;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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led_wlan5 {
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function = LED_FUNCTION_WLAN_5GHZ;
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color = <LED_COLOR_ID_BLUE>;
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gpios = <&gpio1 5 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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led_lan {
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function = LED_FUNCTION_LAN;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
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};
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led_wan {
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function = LED_FUNCTION_WAN;
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color = <LED_COLOR_ID_GREEN>;
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gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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wps {
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label = "WPS";
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio1 1 GPIO_ACTIVE_LOW>;
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};
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reset {
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label = "RST";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio1 2 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&gpio0 {
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status = "okay";
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};
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&gpio1 {
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status = "okay";
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};
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&gpio2 {
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status = "okay";
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};
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&gpio3 {
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status = "okay";
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <70000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x30000>;
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read-only;
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};
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partition@30000 {
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label = "u-boot-env";
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reg = <0x30000 0x10000>;
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};
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partition@40000 {
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compatible = "nvmem-cells";
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label = "factory";
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reg = <0x40000 0x10000>;
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read-only;
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nvmem-layout {
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compatible = "fixed-layout";
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#address-cells = <1>;
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#size-cells = <1>;
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eeprom_factory_0: eeprom@0 {
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reg = <0x0 0x200>;
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};
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eeprom_factory_8000: eeprom@8000 {
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reg = <0x8000 0x200>;
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};
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macaddr_factory_28: macaddr@28 {
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compatible = "mac-base";
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reg = <0x28 0x6>;
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#nvmem-cell-cells = <1>;
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};
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};
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};
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partition@50000 {
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label = "firmware";
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reg = <0x50000 0xf80000>;
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compatible = "openwrt,uimage", "denx,uimage";
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openwrt,ih-magic = <0x26112015>;
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};
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partition@fd0000 {
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label = "crash";
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reg = <0xfd0000 0x10000>;
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};
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partition@fe0000 {
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label = "reserved";
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reg = <0xfe0000 0x10000>;
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read-only;
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};
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partition@ff0000 {
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label = "Bdata";
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reg = <0xff0000 0x10000>;
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};
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};
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};
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};
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&ehci {
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status = "okay";
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};
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&ohci {
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status = "okay";
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};
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ðernet {
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nvmem-cells = <&macaddr_factory_28>;
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nvmem-cell-names = "mac-address";
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mediatek,portmap = "llllw";
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};
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&wmac {
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nvmem-cells = <&eeprom_factory_0>;
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nvmem-cell-names = "eeprom";
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pinctrl-names = "default", "pa_gpio";
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pinctrl-0 = <&pa_pins>;
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pinctrl-1 = <&pa_gpio_pins>;
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};
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&pcie {
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status = "okay";
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};
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&pcie0 {
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mt76@0,0 {
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reg = <0x0000 0 0 0 0>;
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nvmem-cells = <&eeprom_factory_8000>;
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nvmem-cell-names = "eeprom";
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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&state_default {
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gpio {
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groups = "i2c", "uartf", "rgmii1", "rgmii2", "ephy", "wled", "nd_sd";
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function = "gpio";
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};
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};
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