openwrt/target/linux/ramips/dts/mt7620a_dlink_dwr-96x.dtsi

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * D-Link DWR-96x Common Board Description
 * Copyright 2022 Pawel Dembicki <paweldembicki@gmail.com>
 */
#include "mt7620a.dtsi"

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include <dt-bindings/mtd/partitions/uimage.h>

/ {
	aliases {
		led-boot = &led_status;
		led-failsafe = &led_status;
		led-running = &led_status;
		led-upgrade = &led_status;
	};

	keys {
		compatible = "gpio-keys";

		reset {
			label = "reset";
			gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_RESTART>;
		};

		wps {
			label = "wps";
			gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
			linux,code = <KEY_WPS_BUTTON>;
		};

	};

	leds {
		compatible = "gpio-leds";

		led_status: status {
			label = "green:status";
			gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
		};

		wan {
			label = "green:wan";
			gpios = <&gpio0 11 GPIO_ACTIVE_LOW>;
		};

		lan {
			label = "green:lan";
			gpios = <&gpio0 12 GPIO_ACTIVE_LOW>;
		};

		sms {
			label = "green:sms";
			gpios = <&gpio1 15 GPIO_ACTIVE_LOW>;
		};

		signal_green {
			label = "green:signal";
			gpios = <&gpio2 0 GPIO_ACTIVE_HIGH>;
		};

		signal_red {
			label = "red:signal";
			gpios = <&gpio2 1 GPIO_ACTIVE_HIGH>;
		};

		4g {
			label = "green:4g";
			gpios = <&gpio2 2 GPIO_ACTIVE_LOW>;
		};

		3g {
			label = "green:3g";
			gpios = <&gpio2 3 GPIO_ACTIVE_LOW>;
		};

		wlan5g {
			label = "green:wlan5g";
			gpios = <&gpio2 4 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy0tpt";
		};

		wlan2g {
			label = "green:wlan2g";
			gpios = <&gpio3 0 GPIO_ACTIVE_LOW>;
			linux,default-trigger = "phy1tpt";
		};
	};
};

&ehci {
	status = "okay";
};

&gpio1 {
	status = "okay";
};

&gpio2 {
	status = "okay";
};

&gpio3 {
	status = "okay";
};

&ohci {
	status = "okay";
};

&pcie {
	status = "okay";
};

&pcie0 {
	wifi: wifi@0,0 {
		compatible = "mediatek,mt76";
		reg = <0x0000 0 0 0 0>;
		ieee80211-freq-limit = <5000000 6000000>;
	};
};

&spi0 {
	status = "okay";

	flash@0 {
		compatible = "jedec,spi-nor";
		reg = <0>;
		spi-max-frequency = <50000000>;

		partitions {
			compatible = "fixed-partitions";
			#address-cells = <1>;
			#size-cells = <1>;

			partition@0 {
				label = "jboot";
				reg = <0x0 0x10000>;
				read-only;
			};

			partition@10000 {
				compatible = "openwrt,uimage", "denx,uimage";
				openwrt,ih-magic = <IH_MAGIC_OKLI>;
				openwrt,offset = <0x10000>;
				label = "firmware";
				reg = <0x10000 0xfe0000>;
			};

			config: partition@ff0000 {
				label = "config";
				reg = <0xff0000 0x10000>;
				read-only;

				nvmem-layout {
					compatible = "fixed-layout";
					#address-cells = <1>;
					#size-cells = <1>;

					eeprom_config_e08e: eeprom@e08e {
						reg = <0xe08e 0x200>;
					};

					eeprom_config_e29e: eeprom@e29e {
						reg = <0xe29e 0x200>;
					};

					macaddr_config_e50e: macaddr@e50e {
						compatible = "mac-base";
						reg = <0xe50e 0x6>;
						#nvmem-cell-cells = <1>;
					};
				};
			};
		};
	};
};

&state_default {
	default {
		groups = "i2c", "wled", "spi refclk", "uartf", "ephy";
		function = "gpio";
	};
};