openwrt/target/linux/ramips/dts/mt7620a_dlink_dir-510l.dts
Shiji Yang f53fa2a0cb
ramips: convert mt76 PCIe NIC EEPROM to NVMEM format for legacy SoCs
This patch converts MT761{0,2,3} PCIe WiFi calibration data to NVMEM
format for legacy Ralink SoCs (MT7620 and Mt7628). The EEPROM size of
the MT7610 and MT7612 is 0x200. there are only three devices uses
MT7613 NIC, ASUS RT-AC1200 V2, COMFAST CF-WR758AC V2 and Keenetic
KN-1613. The EEPROM size of them is 0x4da8.

Signed-off-by: Shiji Yang <yangshiji66@qq.com>
2023-10-17 12:07:27 +02:00

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// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
#include "mt7620a.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/mtd/partitions/uimage.h>
/ {
compatible = "dlink,dir-510l", "ralink,mt7620a-soc";
model = "D-Link DIR-510L";
aliases {
led-boot = &led_status;
led-failsafe = &led_status;
led-running = &led_status;
led-upgrade = &led_status;
};
chosen {
bootargs = "console=ttyS1,57600";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 1 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
wps {
label = "wps";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_WPS_BUTTON>;
};
};
leds {
compatible = "gpio-leds";
led_status: status {
label = "green:status";
gpios = <&gpio0 14 GPIO_ACTIVE_HIGH>;
};
status-red {
label = "red:status";
gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
};
};
};
&ethernet {
mediatek,portmap = "llllw";
};
&uart {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <50000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "jboot";
reg = <0x0 0x10000>;
read-only;
};
partition@10000 {
label = "recovery";
reg = <0x10000 0x200000>;
read-only;
};
partition@210000 {
compatible = "openwrt,uimage", "denx,uimage";
openwrt,ih-magic = <IH_MAGIC_OKLI>;
openwrt,offset = <0x10000>;
label = "firmware";
reg = <0x210000 0xde0000>;
};
config: partition@ff0000 {
compatible = "nvmem-cells";
label = "config";
reg = <0xff0000 0x10000>;
#address-cells = <1>;
#size-cells = <1>;
read-only;
eeprom_config_e05d: eeprom@e05d {
reg = <0xe05d 0x200>;
};
macaddr_config_e490: macaddr@e490 {
reg = <0xe490 0x6>;
};
};
};
};
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&pcie {
status = "okay";
};
&pcie0 {
mt76x0e@0,0 {
reg = <0x0000 0 0 0 0>;
nvmem-cells = <&eeprom_config_e05d>, <&macaddr_config_e490>;
nvmem-cell-names = "eeprom", "mac-address";
mac-address-increment = <(2)>;
};
};
&state_default {
default {
groups = "i2c", "uartf";
function = "gpio";
};
};