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4b31717fb0
The RTL8231 is an external chip, and not part of the SoC. That means it is more appropriate to define it in the board specific (base) files, instead of the DT include for the SoC itself. Moving the RTL8231 definition also ensures that boards with no GPIO expander, or an alternative one, don't have a useless gpio1 node label defined. Tested on a Netgear GS110TPPv1. Signed-off-by: Sander Vanheule <sander@svanheule.net>
159 lines
2.9 KiB
Plaintext
159 lines
2.9 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "rtl838x.dtsi"
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#include <dt-bindings/input/input.h>
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#include <dt-bindings/gpio/gpio.h>
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/ {
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compatible = "d-link,dgs-1210-10p", "realtek,rtl838x-soc";
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model = "D-Link DGS-1210-10P";
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aliases {
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led-boot = &led_power;
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led-failsafe = &led_power;
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led-running = &led_power;
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led-upgrade = &led_power;
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};
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x8000000>;
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};
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leds {
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pinctrl-names = "default";
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pinctrl-0 = <&pinmux_disable_sys_led>;
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compatible = "gpio-leds";
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led_power: power {
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// GPIO 0 seems to provide power to the leds
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label = "green:power";
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gpios = <&gpio0 0 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys-polled";
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poll-interval = <20>;
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/* is this pin 30 on the external RTL8231 (&gpio1)? */
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/*mode {
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label = "reset";
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gpios = <&gpio0 94 GPIO_ACTIVE_LOW>;
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linux,code = <KEY_RESTART>;
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};*/
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};
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gpio1: rtl8231-gpio {
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compatible = "realtek,rtl8231-gpio";
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#gpio-cells = <2>;
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gpio-controller;
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indirect-access-bus-id = <0>;
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};
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};
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&spi0 {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <10000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x00000000 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "u-boot-env";
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reg = <0x00080000 0x40000>;
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read-only;
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};
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partition@c0000 {
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label = "u-boot-env2";
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reg = <0x000c0000 0x40000>;
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};
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partition@280000 {
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label = "firmware";
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compatible = "denx,uimage";
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reg = <0x00100000 0xd80000>;
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};
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partition@be80000 {
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label = "kernel2";
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reg = <0x00e80000 0x180000>;
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};
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partition@1000000 {
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label = "sysinfo";
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reg = <0x01000000 0x40000>;
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};
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partition@1040000 {
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label = "rootfs2";
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reg = <0x01040000 0xc00000>;
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};
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partition@1c40000 {
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label = "jffs2";
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reg = <0x01c40000 0x3c0000>;
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};
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};
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};
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};
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&uart1 {
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status = "okay";
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};
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ðernet0 {
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mdio: mdio-bus {
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compatible = "realtek,rtl838x-mdio";
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regmap = <ðernet0>;
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#address-cells = <1>;
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#size-cells = <0>;
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INTERNAL_PHY(8)
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INTERNAL_PHY(9)
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INTERNAL_PHY(10)
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INTERNAL_PHY(11)
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INTERNAL_PHY(12)
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INTERNAL_PHY(13)
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INTERNAL_PHY(14)
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INTERNAL_PHY(15)
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INTERNAL_PHY(24)
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INTERNAL_PHY(26)
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};
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};
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&switch0 {
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ports {
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#address-cells = <1>;
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#size-cells = <0>;
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SWITCH_PORT(8, 1, internal)
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SWITCH_PORT(9, 2, internal)
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SWITCH_PORT(10, 3, internal)
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SWITCH_PORT(11, 4, internal)
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SWITCH_PORT(12, 5, internal)
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SWITCH_PORT(13, 6, internal)
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SWITCH_PORT(14, 7, internal)
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SWITCH_PORT(15, 8, internal)
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SWITCH_SFP_PORT(24, 9, rgmii-id)
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SWITCH_SFP_PORT(26, 10, rgmii-id)
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port@28 {
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ethernet = <ðernet0>;
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reg = <28>;
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phy-mode = "internal";
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fixed-link {
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speed = <1000>;
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full-duplex;
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};
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};
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};
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};
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