mirror of
https://github.com/openwrt/openwrt.git
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e1dc73be90
SVN-Revision: 28961
54 lines
2.0 KiB
Diff
54 lines
2.0 KiB
Diff
--- a/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
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+++ b/arch/mips/include/asm/mach-lantiq/falcon/lantiq_soc.h
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@@ -129,8 +129,8 @@ extern __iomem void *ltq_sys1_membase;
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ltq_sys1_w32((ltq_sys1_r32(reg) & ~(clear)) | (set), reg)
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/* gpio_request wrapper to help configure the pin */
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-extern int ltq_gpio_request(unsigned int pin, unsigned int val,
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- unsigned int dir, const char *name);
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+extern int ltq_gpio_request(unsigned int pin, unsigned int alt0,
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+ unsigned int alt1, unsigned int dir, const char *name);
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extern int ltq_gpio_mux_set(unsigned int pin, unsigned int mux);
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/* to keep the irq code generic we need to define these to 0 as falcon
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--- a/arch/mips/lantiq/falcon/gpio.c
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+++ b/arch/mips/lantiq/falcon/gpio.c
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@@ -96,11 +96,12 @@ int ltq_gpio_mux_set(unsigned int pin, u
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}
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EXPORT_SYMBOL(ltq_gpio_mux_set);
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-int ltq_gpio_request(unsigned int pin, unsigned int val,
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- unsigned int dir, const char *name)
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+int ltq_gpio_request(unsigned int pin, unsigned int alt0,
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+ unsigned int alt1, unsigned int dir, const char *name)
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{
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int port = pin / 100;
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int offset = pin % 100;
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+ unsigned int mux = (!!alt0) & ((!!alt1) << 1);
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if (offset >= PINS_PER_PORT || port >= MAX_PORTS)
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return -EINVAL;
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@@ -115,7 +116,7 @@ int ltq_gpio_request(unsigned int pin, u
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else
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gpio_direction_input(pin);
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- return ltq_gpio_mux_set(pin, val);
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+ return ltq_gpio_mux_set(pin, mux);
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}
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EXPORT_SYMBOL(ltq_gpio_request);
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--- a/arch/mips/lantiq/falcon/prom.c
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+++ b/arch/mips/lantiq/falcon/prom.c
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@@ -43,9 +43,9 @@ ltq_soc_setup(void)
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falcon_register_gpio();
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if (register_asc1) {
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ltq_register_asc(1);
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- if (ltq_gpio_request(MUXC_SIF_RX_PIN, 3, 0, "asc1-rx"))
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+ if (ltq_gpio_request(MUXC_SIF_RX_PIN, 1, 1, 0, "asc1-rx"))
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pr_err("failed to request asc1-rx");
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- if (ltq_gpio_request(MUXC_SIF_TX_PIN, 3, 1, "asc1-tx"))
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+ if (ltq_gpio_request(MUXC_SIF_TX_PIN, 1, 1, 1, "asc1-tx"))
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pr_err("failed to request asc1-tx");
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ltq_sysctl_activate(SYSCTL_SYS1, ACTS_ASC1_ACT);
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}
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