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4070e2a64c
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on 6.1, as well as a couple boards equipped with these. Specifications: SoCs: JH7100: - StarFive JH7100 dual-core RISC-V (U74, RC64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache JH7110: - StarFive JH7110 quad-core RISC-V (U74, RV64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache Boards: VisionFive1: - JH7100 @ 1GHz - Memory: 8Gb LPDDR4 - 4x USB3.0 - 1x GBit ethernet - AMPak 6236 wifi / bluetooth - audio - powered via USB-C VisionFive2: - JH7110 @ 1.5GHz - Memory: 2/4/8Gb DDR4 - 2x Gbit ethernet - 2x USB3.0 / 2x USB2.0 - eMMC / SDIO - various multimedia input/outputs (MIPI CSI, HDMI, audio) - M.2 key M slot - PoE support - powered via USB-C Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
87 lines
2.4 KiB
Diff
87 lines
2.4 KiB
Diff
From 35bc6491a7b24872155a616f7770d3a5d6e40344 Mon Sep 17 00:00:00 2001
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From: Walker Chen <walker.chen@starfivetech.com>
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Date: Thu, 19 Jan 2023 17:44:46 +0800
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Subject: [PATCH 035/122] dt-bindings: power: Add starfive,jh7110-pmu
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Add bindings for the Power Management Unit on the StarFive JH7110 SoC.
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Signed-off-by: Walker Chen <walker.chen@starfivetech.com>
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Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
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Reviewed-by: Heiko Stuebner <heiko@sntech.de>
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---
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.../bindings/power/starfive,jh7110-pmu.yaml | 45 +++++++++++++++++++
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.../dt-bindings/power/starfive,jh7110-pmu.h | 17 +++++++
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2 files changed, 62 insertions(+)
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create mode 100644 Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
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create mode 100644 include/dt-bindings/power/starfive,jh7110-pmu.h
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--- /dev/null
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+++ b/Documentation/devicetree/bindings/power/starfive,jh7110-pmu.yaml
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@@ -0,0 +1,45 @@
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+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
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+%YAML 1.2
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+---
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+$id: http://devicetree.org/schemas/power/starfive,jh7110-pmu.yaml#
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+$schema: http://devicetree.org/meta-schemas/core.yaml#
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+
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+title: StarFive JH7110 Power Management Unit
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+
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+maintainers:
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+ - Walker Chen <walker.chen@starfivetech.com>
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+
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+description: |
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+ StarFive JH7110 SoC includes support for multiple power domains which can be
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+ powered on/off by software based on different application scenes to save power.
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+
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+properties:
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+ compatible:
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+ enum:
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+ - starfive,jh7110-pmu
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+
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+ reg:
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+ maxItems: 1
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+
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+ interrupts:
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+ maxItems: 1
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+
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+ "#power-domain-cells":
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+ const: 1
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+
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+required:
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+ - compatible
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+ - reg
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+ - interrupts
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+ - "#power-domain-cells"
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+
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+additionalProperties: false
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+
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+examples:
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+ - |
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+ pwrc: power-controller@17030000 {
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+ compatible = "starfive,jh7110-pmu";
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+ reg = <0x17030000 0x10000>;
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+ interrupts = <111>;
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+ #power-domain-cells = <1>;
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+ };
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--- /dev/null
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+++ b/include/dt-bindings/power/starfive,jh7110-pmu.h
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@@ -0,0 +1,17 @@
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+/* SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) */
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+/*
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+ * Copyright (C) 2022 StarFive Technology Co., Ltd.
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+ * Author: Walker Chen <walker.chen@starfivetech.com>
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+ */
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+#ifndef __DT_BINDINGS_POWER_JH7110_POWER_H__
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+#define __DT_BINDINGS_POWER_JH7110_POWER_H__
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+
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+#define JH7110_PD_SYSTOP 0
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+#define JH7110_PD_CPU 1
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+#define JH7110_PD_GPUA 2
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+#define JH7110_PD_VDEC 3
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+#define JH7110_PD_VOUT 4
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+#define JH7110_PD_ISP 5
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+#define JH7110_PD_VENC 6
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+
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+#endif
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