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02f815d190
That commit exposed a bug in the DTS files used by mt7621 where the wrong reg value for pcie1 (and potentially pcie2) was being used. This was causing WiFi failures for interfaces in pcie1. eg. 2.4GHz working but not 5GHz. As all of these dts entries are already specified in mt7621.dtsi, remove them. Signed-off-by: Rosen Penev <rosenp@gmail.com>
145 lines
2.1 KiB
Plaintext
145 lines
2.1 KiB
Plaintext
/dts-v1/;
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#include "mt7621.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "hiwifi,hc5962", "mediatek,mt7621-soc";
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model = "HiWiFi HC5962";
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memory@0 {
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device_type = "memory";
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reg = <0x0 0x10000000>;
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};
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chosen {
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bootargs = "console=ttyS0,115200";
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};
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gpio-leds {
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compatible = "gpio-leds";
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status {
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label = "hc5962:white:status";
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gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
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};
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system {
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label = "hc5962:red:system";
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gpios = <&gpio0 7 GPIO_ACTIVE_LOW>;
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};
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};
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gpio-keys-polled {
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compatible = "gpio-keys-polled";
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#address-cells = <1>;
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#size-cells = <0>;
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poll-interval = <20>;
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reset {
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label = "reset";
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gpios = <&gpio0 18 GPIO_ACTIVE_HIGH>;
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linux,code = <KEY_RESTART>;
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};
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};
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};
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&nand {
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status = "okay";
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partition@0 {
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label = "u-boot";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "debug";
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reg = <0x80000 0x80000>;
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read-only;
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};
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factory: partition@100000 {
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label = "factory";
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reg = <0x100000 0x40000>;
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read-only;
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};
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partition@140000 {
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label = "kernel";
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reg = <0x140000 0x200000>;
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};
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partition@340000 {
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label = "ubi";
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reg = <0x340000 0x1E00000>;
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};
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partition@2140000 {
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label = "hw_panic";
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reg = <0x2140000 0x80000>;
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read-only;
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};
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partition@21c0000 {
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label = "bdinfo";
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reg = <0x21c0000 0x80000>;
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read-only;
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};
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partition@2240000 {
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label = "backup";
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reg = <0x2240000 0x80000>;
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read-only;
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};
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partition@22c0000 {
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label = "overly";
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reg = <0x22c0000 0x1000000>;
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};
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partition@32c0000 {
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label = "firmware_backup";
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reg = <0x32c0000 0x2000000>;
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};
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partition@52c0000 {
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label = "oem";
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reg = <0x52c0000 0x200000>;
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};
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partition@54c0000 {
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label = "opt";
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reg = <0x54c0000 0x2ac0000>;
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};
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};
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&pcie {
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status = "okay";
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pcie0 {
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mt76@0,0 {
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mediatek,mtd-eeprom = <&factory 0x0000>;
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ieee80211-freq-limit = <2400000 2500000>;
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};
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};
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pcie1 {
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mt76@1,0 {
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mediatek,mtd-eeprom = <&factory 0x8000>;
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ieee80211-freq-limit = <5000000 6000000>;
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};
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};
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};
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&pinctrl {
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state_default: pinctrl0 {
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gpio {
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ralink,group = "uart3", "jtag";
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ralink,function = "gpio";
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};
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};
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};
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