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4070e2a64c
This target adds support for the StarFive JH7100 and JH7110 SoCs, based on 6.1, as well as a couple boards equipped with these. Specifications: SoCs: JH7100: - StarFive JH7100 dual-core RISC-V (U74, RC64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache JH7110: - StarFive JH7110 quad-core RISC-V (U74, RV64GC) - additional monitoring (S7) and control (E24) cores - 2Mb L2 cache Boards: VisionFive1: - JH7100 @ 1GHz - Memory: 8Gb LPDDR4 - 4x USB3.0 - 1x GBit ethernet - AMPak 6236 wifi / bluetooth - audio - powered via USB-C VisionFive2: - JH7110 @ 1.5GHz - Memory: 2/4/8Gb DDR4 - 2x Gbit ethernet - 2x USB3.0 / 2x USB2.0 - eMMC / SDIO - various multimedia input/outputs (MIPI CSI, HDMI, audio) - M.2 key M slot - PoE support - powered via USB-C Installation: Standard SD-card installation via dd-ing the generated image to an SD-card of at least 256Mb. Signed-off-by: Zoltan HERPAI <wigyori@uid0.hu>
49 lines
1.6 KiB
Diff
49 lines
1.6 KiB
Diff
From f684a12dac29522c6ce9d504522f75dcf024fc5f Mon Sep 17 00:00:00 2001
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From: Emil Renner Berthing <kernel@esmil.dk>
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Date: Sat, 20 Nov 2021 19:29:25 +0100
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Subject: [PATCH 1020/1024] dt-bindings: reset: Add StarFive JH7100 audio reset
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definitions
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Add all resets for the StarFive JH7100 audio reset controller.
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Signed-off-by: Emil Renner Berthing <kernel@esmil.dk>
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---
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.../dt-bindings/reset/starfive-jh7100-audio.h | 31 +++++++++++++++++++
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1 file changed, 31 insertions(+)
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create mode 100644 include/dt-bindings/reset/starfive-jh7100-audio.h
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--- /dev/null
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+++ b/include/dt-bindings/reset/starfive-jh7100-audio.h
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@@ -0,0 +1,31 @@
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+/* SPDX-License-Identifier: GPL-2.0 OR MIT */
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+/*
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+ * Copyright (C) 2021 Emil Renner Berthing
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+ */
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+
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+#ifndef __DT_BINDINGS_RESET_STARFIVE_JH7100_AUDIO_H__
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+#define __DT_BINDINGS_RESET_STARFIVE_JH7100_AUDIO_H__
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+
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+#define JH7100_AUDRSTN_APB_BUS 0
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+#define JH7100_AUDRSTN_I2SADC_APB 1
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+#define JH7100_AUDRSTN_I2SADC_SRST 2
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+#define JH7100_AUDRSTN_PDM_APB 3
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+#define JH7100_AUDRSTN_I2SVAD_APB 4
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+#define JH7100_AUDRSTN_I2SVAD_SRST 5
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+#define JH7100_AUDRSTN_SPDIF_APB 6
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+#define JH7100_AUDRSTN_PWMDAC_APB 7
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+#define JH7100_AUDRSTN_I2SDAC_APB 8
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+#define JH7100_AUDRSTN_I2SDAC_SRST 9
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+#define JH7100_AUDRSTN_I2S1_APB 10
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+#define JH7100_AUDRSTN_I2S1_SRST 11
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+#define JH7100_AUDRSTN_I2SDAC16K_APB 12
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+#define JH7100_AUDRSTN_I2SDAC16K_SRST 13
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+#define JH7100_AUDRSTN_DMA1P_AHB 14
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+#define JH7100_AUDRSTN_USB_APB 15
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+#define JH7100_AUDRST_USB_AXI 16
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+#define JH7100_AUDRST_USB_PWRUP_RST_N 17
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+#define JH7100_AUDRST_USB_PONRST 18
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+
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+#define JH7100_AUDRSTN_END 19
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+
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+#endif /* __DT_BINDINGS_RESET_STARFIVE_JH7100_AUDIO_H__ */
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