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7d7aa2fd92
This change makes the names of Broadcom targets consistent by using the common notation based on SoC/CPU ID (which is used internally anyway), bcmXXXX instead of brcmXXXX. This is even used for target TITLE in make menuconfig already, only the short target name used brcm so far. Despite, since subtargets range from bcm2708 to bcm2711, it seems appropriate to use bcm27xx instead of bcm2708 (again, as already done for BOARDNAME). This also renames the packages brcm2708-userland and brcm2708-gpu-fw. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de> Acked-by: Álvaro Fernández Rojas <noltari@gmail.com>
64 lines
2.7 KiB
Diff
64 lines
2.7 KiB
Diff
From ea7ff2070d564858c445cfdbd883ea00927c0ada Mon Sep 17 00:00:00 2001
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From: P33M <p33m@github.com>
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Date: Tue, 9 Apr 2019 16:40:48 +0100
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Subject: [PATCH] dwc_otg: fix locking around dequeueing and killing
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URBs
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kill_urbs_in_qh_list() is practically only ever called with the fiq lock
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already held, so don't spinlock twice in the case where we need to cancel
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an isochronous transfer.
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Also fix up a case where the global interrupt register could be read with
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the fiq lock not held.
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Fixes the deadlock seen in https://github.com/raspberrypi/linux/issues/2907
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---
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drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c | 9 +++++++--
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drivers/usb/host/dwc_otg/dwc_otg_hcd.c | 4 ----
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2 files changed, 7 insertions(+), 6 deletions(-)
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--- a/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c
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+++ b/drivers/usb/host/dwc_otg/dwc_otg_cil_intr.c
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@@ -1344,16 +1344,21 @@ static inline uint32_t dwc_otg_read_comm
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*/
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gintmsk_common.b.portintr = 1;
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}
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- gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts);
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- gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk);
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if(fiq_enable) {
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local_fiq_disable();
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+ fiq_fsm_spin_lock(&hcd->fiq_state->lock);
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+ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts);
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+ gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk);
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/* Pull in the interrupts that the FIQ has masked */
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gintmsk.d32 |= ~(hcd->fiq_state->gintmsk_saved.d32);
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gintmsk.d32 |= gintmsk_common.d32;
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/* for the upstairs function to reenable - have to read it here in case FIQ triggers again */
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reenable_gintmsk->d32 = gintmsk.d32;
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+ fiq_fsm_spin_unlock(&hcd->fiq_state->lock);
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local_fiq_enable();
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+ } else {
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+ gintsts.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintsts);
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+ gintmsk.d32 = DWC_READ_REG32(&core_if->core_global_regs->gintmsk);
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}
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gahbcfg.d32 = DWC_READ_REG32(&core_if->core_global_regs->gahbcfg);
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--- a/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
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+++ b/drivers/usb/host/dwc_otg/dwc_otg_hcd.c
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@@ -195,15 +195,11 @@ static void kill_urbs_in_qh_list(dwc_otg
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* but not yet been through the IRQ handler.
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*/
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if (fiq_fsm_enable && (hcd->fiq_state->channel[qh->channel->hc_num].fsm != FIQ_PASSTHROUGH)) {
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- local_fiq_disable();
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- fiq_fsm_spin_lock(&hcd->fiq_state->lock);
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qh->channel->halt_status = DWC_OTG_HC_XFER_URB_DEQUEUE;
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qh->channel->halt_pending = 1;
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if (hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_TURBO ||
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hcd->fiq_state->channel[n].fsm == FIQ_HS_ISOC_SLEEPING)
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hcd->fiq_state->channel[n].fsm = FIQ_HS_ISOC_ABORTED;
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- fiq_fsm_spin_unlock(&hcd->fiq_state->lock);
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- local_fiq_enable();
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} else {
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dwc_otg_hc_halt(hcd->core_if, qh->channel,
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DWC_OTG_HC_XFER_URB_DEQUEUE);
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