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e5f81ea3fe
The spi-ath79 driver performs the chipselect by writing to dedicated register in the SPI register block. So the GPIO numbers were not used. Tested-on: Enterasys WS-AP3705i Signed-off-by: David Bauer <mail@david-bauer.net>
225 lines
3.6 KiB
Plaintext
225 lines
3.6 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include "ar9344.dtsi"
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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/ {
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compatible = "enterasys,ws-ap3705i", "qca,ar9344";
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model = "Enterasys WS-AP3705i";
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chosen {
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bootargs = "console=ttyS0,115200n8";
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};
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aliases {
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led-boot = &led_power_green;
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led-failsafe = &led_power_red;
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led-running = &led_power_green;
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led-upgrade = &led_power_red;
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label-mac-device = ð0;
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};
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mtd-concat {
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compatible = "mtd-concat";
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devices = <&fwconcat0 &fwconcat1>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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compatible = "denx,uimage";
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label = "firmware";
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reg = <0x0 0x1dd0000>;
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};
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};
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};
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leds {
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compatible = "gpio-leds";
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pinctrl-names = "default";
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pinctrl-0 = <&enable_gpio_11 &enable_gpio_16>;
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led_power_green: power_green {
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label = "green:power";
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gpios = <&gpio 13 GPIO_ACTIVE_LOW>;
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};
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led_power_red: power_red {
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label = "red:power";
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gpios = <&gpio 16 GPIO_ACTIVE_LOW>;
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};
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lan_blue {
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label = "blue:lan";
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gpios = <&gpio 19 GPIO_ACTIVE_HIGH>;
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};
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lan_green {
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label = "green:lan";
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gpios = <&gpio 20 GPIO_ACTIVE_HIGH>;
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};
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radio2 {
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label = "green:radio2";
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gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy0tpt";
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};
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};
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ath9k-leds {
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compatible = "gpio-leds";
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radio1 {
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label = "green:radio1";
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gpios = <&ath9k 0 GPIO_ACTIVE_LOW>;
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linux,default-trigger = "phy1tpt";
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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label = "Reset button";
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
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};
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};
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};
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&ref {
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clock-frequency = <40000000>;
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};
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&pinmux {
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enable_gpio_16: pinmux_enable_gpio_16 {
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pinctrl-single,bits = <0x10 0x0 0x000000ff>;
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};
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enable_gpio_11: pinmux_enable_gpio_11 {
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pinctrl-single,bits = <0x8 0x0 0xff000000>;
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};
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};
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&wmac {
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status = "okay";
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qca,no-eeprom;
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};
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&spi {
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status = "okay";
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot-bak";
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reg = <0x0 0x80000>;
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read-only;
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};
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partition@80000 {
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label = "u-boot-env0";
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reg = <0x80000 0x10000>;
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read-only;
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};
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partition@90000 {
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label = "u-boot-env1";
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reg = <0x90000 0x10000>;
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read-only;
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};
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partition@a0000 {
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label = "u-boot";
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reg = <0xa0000 0x80000>;
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read-only;
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};
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partition@120000 {
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label = "calibrate";
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reg = <0x120000 0x10000>;
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read-only;
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};
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partition@130000 {
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label = "nvram";
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reg = <0x130000 0x100000>;
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read-only;
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};
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fwconcat0: partition@230000 {
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label = "fwconcat0";
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reg = <0x230000 0xdd0000>;
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};
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};
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};
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flash@1 {
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compatible = "jedec,spi-nor";
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reg = <1>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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fwconcat1: partition@0 {
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label = "fwconcat1";
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reg = <0x0 0x1000000>;
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};
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};
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};
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};
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&pcie {
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status = "okay";
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ath9k: wifi@0,0 {
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compatible = "pci168c,0033";
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reg = <0x0000 0 0 0 0>;
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qca,no-eeprom;
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#gpio-cells = <2>;
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gpio-controller;
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};
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};
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&mdio0 {
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status = "okay";
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phy0: ethernet-phy@0 {
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reg = <0>;
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};
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};
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ð0 {
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status = "okay";
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pll-data = <0x1e000000 0x08000101 0x08001313>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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gmac-config {
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device = <&gmac>;
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rgmii-gmac0 = <1>;
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rxd-delay = <0>;
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rxdv-delay = <0>;
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txen-delay = <0>;
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txd-delay = <0>;
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};
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};
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