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f4afa00862
This target currently only supports Moschip's MCS8140 SoC, but support for other chips in the same family (MCS8142, MCS8144) will be easy to add. Target support is entirely using Device Tree for probing peripherals. Drivers support include: - PCI - USB 1 & 2 - watchdog - random number generator - UART - timer - internal Ethernet PHY - Ethernet MAC core Support for the following boards is included using Device Tree - Devolo dLAN USB Extender - Tigal RBT-832 SVN-Revision: 32462
134 lines
3.2 KiB
C
134 lines
3.2 KiB
C
/*
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* Moschip MCS814x timer routines
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*
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* Copyright (C) 2012, Florian Fainelli <florian@openwrt.org>
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*
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* Licensed under GPLv2
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*/
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#include <linux/kernel.h>
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#include <linux/interrupt.h>
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#include <linux/time.h>
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#include <linux/timex.h>
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#include <linux/irq.h>
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#include <linux/err.h>
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#include <linux/clk.h>
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#include <linux/io.h>
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#include <linux/of.h>
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#include <linux/of_address.h>
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#include <asm/mach/time.h>
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#include <mach/hardware.h>
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/* Timer block registers */
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#define TIMER_VAL 0x00
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#define TIMER_CTL 0x04
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static u32 last_reload;
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static u32 timer_correct;
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static u32 clock_rate;
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static u32 timer_reload_value;
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static void __iomem *mcs814x_timer_base;
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static inline unsigned long ticks2usecs(u32 x)
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{
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return x / (clock_rate / 1000000);
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}
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/*
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* Returns number of ms since last clock interrupt. Note that interrupts
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* will have been disabled by do_gettimeoffset()
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*/
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static unsigned long mcs814x_gettimeoffset(void)
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{
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u32 ticks = __raw_readl(mcs814x_timer_base + TIMER_VAL);
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if (ticks < last_reload)
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return ticks2usecs(ticks + (u32)(0xffffffff - last_reload));
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else
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return ticks2usecs(ticks - last_reload);
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}
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static irqreturn_t mcs814x_timer_interrupt(int irq, void *dev_id)
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{
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u32 count = __raw_readl(mcs814x_timer_base + TIMER_VAL);
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/* take into account delay up to this moment */
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last_reload = count + timer_correct + timer_reload_value;
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if (last_reload < timer_reload_value) {
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last_reload = timer_reload_value;
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} else {
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if (timer_correct == 0)
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timer_correct = __raw_readl(mcs814x_timer_base + TIMER_VAL) - count;
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}
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__raw_writel(last_reload, mcs814x_timer_base + TIMER_VAL);
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timer_tick();
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return IRQ_HANDLED;
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}
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static struct irqaction mcs814x_timer_irq = {
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.name = "mcs814x-timer",
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.flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
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.handler = mcs814x_timer_interrupt,
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};
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static struct of_device_id mcs814x_timer_ids[] = {
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{ .compatible = "moschip,mcs814x-timer" },
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{ /* sentinel */ },
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};
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static void __init mcs814x_of_timer_init(void)
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{
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struct device_node *np;
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const unsigned int *intspec;
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np = of_find_matching_node(NULL, mcs814x_timer_ids);
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if (!np)
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panic("unable to find compatible timer node in dtb");
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mcs814x_timer_base = of_iomap(np, 0);
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if (!mcs814x_timer_base)
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panic("unable to remap timer cpu registers");
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intspec = of_get_property(np, "interrupts", NULL);
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if (!intspec)
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panic("no interrupts property for timer");
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mcs814x_timer_irq.irq = be32_to_cpup(intspec);
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}
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static void __init mcs814x_timer_init(void)
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{
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struct clk *clk;
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clk = clk_get_sys("timer0", NULL);
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if (IS_ERR_OR_NULL(clk))
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panic("unable to get timer0 clock");
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clock_rate = clk_get_rate(clk);
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clk_put(clk);
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mcs814x_of_timer_init();
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pr_info("Timer frequency: %d (kHz)\n", clock_rate / 1000);
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timer_reload_value = 0xffffffff - (clock_rate / HZ);
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/* disable timer */
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__raw_writel(0, mcs814x_timer_base + TIMER_CTL);
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__raw_writel(timer_reload_value, mcs814x_timer_base + TIMER_VAL);
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last_reload = timer_reload_value;
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setup_irq(mcs814x_timer_irq.irq, &mcs814x_timer_irq);
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/* enable timer, stop timer in debug mode */
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__raw_writel(0x03, mcs814x_timer_base + TIMER_CTL);
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}
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struct sys_timer mcs814x_timer = {
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.init = mcs814x_timer_init,
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.offset = mcs814x_gettimeoffset,
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};
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