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5ecc0cfd6f
Changelog since 5.4.24 mentions CVE-2019-19769, CVE-2020-8648, CVE-2020-8649 and CVE-2020-8647. Removed upstreamed: generic: 507-v5.6-iio-chemical-sps30-fix-missing-triggered-buffer-depe.patch generic: 600-ipv6-addrconf-call-ipv6_mc_up-for-non-Ethernet-inter.patch bcm27xx: 950-0435-ASoC-pcm512x-Fix-unbalanced-regulator-enable-call-in.patch ipq806x: 701-stmmac-fix-notifier-registration.patch lantiq: 002-pinctrl-falcon-fix-syntax-error.patch octeontx: 0002-net-thunderx-workaround-BGX-TX-Underflow-issue.patch Run tested: apu2, qemu-x86-64, apalis, a64-olinuxino, nbg6617 Build tested: sunxi/a53, imx6, x86/64, ipq40xx Tested-by: Kevin Darbyshire-Bryant <ldir@darbyshire-bryant.me.uk> [apu2] Signed-off-by: Petr Štetiar <ynezz@true.cz>
60 lines
1.8 KiB
Diff
60 lines
1.8 KiB
Diff
From d0ff7a1bcfe886cab1a237895b08ac51ecfe10e7 Mon Sep 17 00:00:00 2001
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From: Tim Harvey <tharvey@gateworks.com>
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Date: Wed, 10 Apr 2019 08:00:47 -0700
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Subject: [PATCH 04/12] PCI: add quirk for Gateworks PLX PEX860x switch with
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GPIO PERST#
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Gateworks boards use PLX PEX860x switches where downstream ports
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have their PERST# driven from the PEX GPIO.
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Signed-off-by: Tim Harvey <tharvey@gateworks.com>
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---
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drivers/pci/quirks.c | 32 ++++++++++++++++++++++++++++++++
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1 file changed, 32 insertions(+)
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--- a/drivers/pci/quirks.c
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+++ b/drivers/pci/quirks.c
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@@ -25,6 +25,7 @@
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#include <linux/ktime.h>
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#include <linux/mm.h>
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#include <linux/nvme.h>
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+#include <linux/of.h>
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#include <linux/platform_data/x86/apple.h>
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#include <linux/pm_runtime.h>
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#include <linux/switchtec.h>
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@@ -5431,3 +5432,34 @@ out_disable:
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DECLARE_PCI_FIXUP_CLASS_FINAL(PCI_VENDOR_ID_NVIDIA, 0x13b1,
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PCI_CLASS_DISPLAY_VGA, 8,
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quirk_reset_lenovo_thinkpad_p50_nvgpu);
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+
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+#ifdef CONFIG_PCI_HOST_THUNDER_PEM
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+/*
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+ * fixup for PLX PEX8909 bridge to configure GPIO1-7 as output High
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+ * as they are used for slots1-7 PERST#
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+ */
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+static void newport_pciesw_early_fixup(struct pci_dev *dev)
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+{
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+ u32 dw;
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+
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+ if (!of_machine_is_compatible("gw,newport"))
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+ return;
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+
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+ if (dev->devfn != 0)
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+ return;
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+
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+ dev_info(&dev->dev, "de-asserting PERST#\n");
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+ pci_read_config_dword(dev, 0x62c, &dw);
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+ dw |= 0xaaa8; /* GPIO1-7 outputs */
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+ pci_write_config_dword(dev, 0x62c, dw);
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+
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+ pci_read_config_dword(dev, 0x644, &dw);
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+ dw |= 0xfe; /* GPIO1-7 output high */
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+ pci_write_config_dword(dev, 0x644, dw);
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+
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+ msleep(100);
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+}
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8609, newport_pciesw_early_fixup);
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8606, newport_pciesw_early_fixup);
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+DECLARE_PCI_FIXUP_EARLY(PCI_VENDOR_ID_PLX, 0x8604, newport_pciesw_early_fixup);
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+#endif /* CONFIG_PCI_HOST_THUNDER_PEM */
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