mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-20 22:23:27 +00:00
e7bfda2c24
This change makes the names of Broadcom targets consistent by using the common notation based on SoC/CPU ID (which is used internally anyway), bcmXXXX instead of brcmXXXX. This is even used for target TITLE in make menuconfig already, only the short target name used brcm so far. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
56 lines
1.9 KiB
Diff
56 lines
1.9 KiB
Diff
From 5c290c81dbdb4433600593fe80c88eb4af86e791 Mon Sep 17 00:00:00 2001
|
|
From: Jonas Gorski <jogo@openwrt.org>
|
|
Date: Sun, 8 Dec 2013 03:22:40 +0100
|
|
Subject: [PATCH 50/53] MIPS: BCM63XX: add pcie support for BCM63268
|
|
|
|
---
|
|
arch/mips/bcm63xx/reset.c | 3 ++-
|
|
arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h | 5 +++++
|
|
arch/mips/pci/pci-bcm63xx.c | 4 ++++
|
|
3 files changed, 11 insertions(+), 1 deletion(-)
|
|
|
|
--- a/arch/mips/bcm63xx/reset.c
|
|
+++ b/arch/mips/bcm63xx/reset.c
|
|
@@ -137,7 +137,8 @@
|
|
#define BCM63268_RESET_PCM SOFTRESET_63268_PCM_MASK
|
|
#define BCM63268_RESET_MPI 0
|
|
#define BCM63268_RESET_PCIE (SOFTRESET_63268_PCIE_MASK | \
|
|
- SOFTRESET_63268_PCIE_CORE_MASK)
|
|
+ SOFTRESET_63268_PCIE_CORE_MASK | \
|
|
+ SOFTRESET_63268_PCIE_HARD_MASK)
|
|
#define BCM63268_RESET_PCIE_EXT SOFTRESET_63268_PCIE_EXT_MASK
|
|
|
|
/*
|
|
--- a/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
|
|
+++ b/arch/mips/include/asm/mach-bcm63xx/bcm63xx_io.h
|
|
@@ -46,6 +46,11 @@
|
|
#define BCM_PCIE_MEM_END_PA_6328 (BCM_PCIE_MEM_BASE_PA_6328 + \
|
|
BCM_PCIE_MEM_SIZE_6328 - 1)
|
|
|
|
+#define BCM_PCIE_MEM_BASE_PA_63268 0x11000000
|
|
+#define BCM_PCIE_MEM_SIZE_63268 (15 * 1024 * 1024)
|
|
+#define BCM_PCIE_MEM_END_PA_63268 (BCM_PCIE_MEM_BASE_PA_63268 + \
|
|
+ BCM_PCIE_MEM_SIZE_63268 - 1)
|
|
+
|
|
/*
|
|
* Internal registers are accessed through KSEG3
|
|
*/
|
|
--- a/arch/mips/pci/pci-bcm63xx.c
|
|
+++ b/arch/mips/pci/pci-bcm63xx.c
|
|
@@ -337,11 +337,15 @@ static int __init bcm63xx_pci_init(void)
|
|
if (BCMCPU_IS_6328() || BCMCPU_IS_6362()) {
|
|
bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_6328;
|
|
bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_6328;
|
|
+ } else if (BCMCPU_IS_63268()) {
|
|
+ bcm_pcie_mem_resource.start = BCM_PCIE_MEM_BASE_PA_63268;
|
|
+ bcm_pcie_mem_resource.end = BCM_PCIE_MEM_END_PA_63268;
|
|
}
|
|
|
|
switch (bcm63xx_get_cpu_id()) {
|
|
case BCM6328_CPU_ID:
|
|
case BCM6362_CPU_ID:
|
|
+ case BCM63268_CPU_ID:
|
|
return bcm63xx_register_pcie();
|
|
case BCM3368_CPU_ID:
|
|
case BCM6348_CPU_ID:
|