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1. Add sdhc clock for MT7620 and MT76x8 SoCs. 2. Fix clock driver warning for RT2880, RT305x and RT3883. Link: https://lore.kernel.org/all/20240910044024.120009-1-sergio.paracuellos@gmail.com/ Signed-off-by: Shiji Yang <yangshiji66@qq.com> Link: https://github.com/openwrt/openwrt/pull/17037 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
49 lines
2.1 KiB
Diff
49 lines
2.1 KiB
Diff
From 33239152305567b3e9bf052f71fd4baecd626341 Mon Sep 17 00:00:00 2001
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From: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Date: Tue, 10 Sep 2024 06:40:22 +0200
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Subject: [PATCH 1/3] clk: ralink: mtmips: fix clock plan for Ralink SoC RT3883
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Clock plan for Ralink SoC RT3883 needs an extra 'periph' clock to properly
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set some peripherals that has this clock as their parent. When this driver
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was mainlined we could not find any active users of this SoC so we cannot
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perform any real tests for it. Now, one user of a Belkin f9k1109 version 1
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device which uses this SoC appear and reported some issues in openWRT:
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- https://github.com/openwrt/openwrt/issues/16054
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The peripherals that are wrong are 'uart', 'i2c', 'i2s' and 'uartlite' which
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has a not defined 'periph' clock as parent. Hence, introduce it to have a
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properly working clock plan for this SoC.
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Fixes: 6f3b15586eef ("clk: ralink: add clock and reset driver for MTMIPS SoCs")
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Signed-off-by: Sergio Paracuellos <sergio.paracuellos@gmail.com>
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Link: https://lore.kernel.org/r/20240910044024.120009-2-sergio.paracuellos@gmail.com
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Signed-off-by: Stephen Boyd <sboyd@kernel.org>
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---
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drivers/clk/ralink/clk-mtmips.c | 9 +++++++--
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1 file changed, 7 insertions(+), 2 deletions(-)
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--- a/drivers/clk/ralink/clk-mtmips.c
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+++ b/drivers/clk/ralink/clk-mtmips.c
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@@ -267,6 +267,11 @@ static struct mtmips_clk_fixed rt305x_fi
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CLK_FIXED("xtal", NULL, 40000000)
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};
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+static struct mtmips_clk_fixed rt3883_fixed_clocks[] = {
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+ CLK_FIXED("xtal", NULL, 40000000),
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+ CLK_FIXED("periph", "xtal", 40000000)
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+};
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+
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static struct mtmips_clk_fixed rt3352_fixed_clocks[] = {
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CLK_FIXED("periph", "xtal", 40000000)
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};
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@@ -779,8 +784,8 @@ static const struct mtmips_clk_data rt33
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static const struct mtmips_clk_data rt3883_clk_data = {
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.clk_base = rt3883_clks_base,
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.num_clk_base = ARRAY_SIZE(rt3883_clks_base),
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- .clk_fixed = rt305x_fixed_clocks,
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- .num_clk_fixed = ARRAY_SIZE(rt305x_fixed_clocks),
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+ .clk_fixed = rt3883_fixed_clocks,
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+ .num_clk_fixed = ARRAY_SIZE(rt3883_fixed_clocks),
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.clk_factor = NULL,
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.num_clk_factor = 0,
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.clk_periph = rt5350_pherip_clks,
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