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dc4eae7a8c
Specification: - SoC: Qualcomm Atheros QCA9563 (775 MHz, MIPS 74Kc) - RAM: 128 MiB - Storage: 16MB NOR flash - Wireless: Built into QCA9563 (Dragonfly), PHY modes b/g/n, 3x3 MIMO - Ethernet: 2x1G Tested and working: - ethernet / switch / lan / wan - 2.4GHz SoC wifi - PCIe - leds - buzzer Ramload: - tftpboot 0x84000000 lede-ar71xx-generic-wpj563-16M-initramfs-uImage.bin - bootm 0x84000000 Install: - tftpboot 0x80500000 lede-ar71xx-generic-wpj563-16M-squashfs-sysupgrade.bin - erase 0x9f030000 +$filesize - erase 0x9f680000 +1 - cp.b $fileaddr 0x9f030000 $filesize Erasing 0x9f680000 is required because uboot defines "bootcmd=bootm 0x9f680000 || bootm 0x9f030000", so it first tries to boot the higher address. I think the 16 mb flash are intended to be used as 8+8mb for a fallback image. In my hardware only the lower address has a bootable image. But to make sure future hardware will boot lede too, I erase one block, so uboot will skip this address. Signed-off-by: Christian Mehlis <christian@m3hlis.de>
151 lines
4.0 KiB
C
151 lines
4.0 KiB
C
/*
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* Compex WPJ563 board support
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*
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* Copyright (c) 2015 Qualcomm Atheros
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* Copyright (c) 2012 Gabor Juhos <juhosg@openwrt.org>
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*
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* Permission to use, copy, modify, and/or distribute this software for any
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* purpose with or without fee is hereby granted, provided that the above
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* copyright notice and this permission notice appear in all copies.
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*
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* THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
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* WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
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* MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
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* ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
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* WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
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* ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
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* OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
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*
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*/
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#include <linux/platform_device.h>
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#include <linux/ath9k_platform.h>
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#include <linux/ar8216_platform.h>
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#include <asm/mach-ath79/ar71xx_regs.h>
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#include "common.h"
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#include "dev-m25p80.h"
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#include "machtypes.h"
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#include "pci.h"
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#include "dev-eth.h"
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#include "dev-gpio-buttons.h"
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#include "dev-leds-gpio.h"
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#include "dev-spi.h"
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#include "dev-usb.h"
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#include "dev-wmac.h"
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#define WPJ563_GPIO_LED_SIG1 1
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#define WPJ563_GPIO_LED_SIG2 5
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#define WPJ563_GPIO_LED_SIG3 6
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#define WPJ563_GPIO_LED_SIG4 7
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#define WPJ563_GPIO_BUZZER 19
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#define WPJ563_GPIO_BTN_RESET 2
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#define WPJ563_KEYS_POLL_INTERVAL 20 /* msecs */
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#define WPJ563_KEYS_DEBOUNCE_INTERVAL (3 * WPJ563_KEYS_POLL_INTERVAL)
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#define WPJ563_MAC0_OFFSET 0x10
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#define WPJ563_MAC1_OFFSET 0x18
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#define WPJ563_WMAC_CALDATA_OFFSET 0x1000
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static struct gpio_led WPJ563_leds_gpio[] __initdata = {
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{
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.name = "wpj563:green:sig1",
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.gpio = WPJ563_GPIO_LED_SIG1,
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.active_low = 1,
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},
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{
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.name = "wpj563:green:sig2",
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.gpio = WPJ563_GPIO_LED_SIG2,
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.active_low = 1,
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},
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{
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.name = "wpj563:green:sig3",
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.gpio = WPJ563_GPIO_LED_SIG3,
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.active_low = 1,
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},
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{
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.name = "wpj563:green:sig4",
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.gpio = WPJ563_GPIO_LED_SIG4,
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.active_low = 1,
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},
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{
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.name = "wpj563:buzzer",
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.gpio = WPJ563_GPIO_BUZZER,
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.active_low = 0,
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}
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};
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static struct gpio_keys_button WPJ563_gpio_keys[] __initdata = {
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{
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.desc = "Reset button",
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.type = EV_KEY,
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.code = KEY_RESTART,
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.debounce_interval = WPJ563_KEYS_DEBOUNCE_INTERVAL,
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.gpio = WPJ563_GPIO_BTN_RESET,
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.active_low = 1,
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},
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};
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static struct ar8327_pad_cfg WPJ563_ar8337_pad0_cfg = {
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.mode = AR8327_PAD_MAC_SGMII,
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.sgmii_delay_en = true,
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};
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static struct ar8327_platform_data WPJ563_ar8337_data = {
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.pad0_cfg = &WPJ563_ar8337_pad0_cfg,
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.port0_cfg = {
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.force_link = 1,
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.speed = AR8327_PORT_SPEED_1000,
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.duplex = 1,
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.txpause = 1,
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.rxpause = 1,
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},
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};
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static struct mdio_board_info WPJ563_mdio0_info[] = {
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{
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.bus_id = "ag71xx-mdio.0",
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.phy_addr = 0,
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.platform_data = &WPJ563_ar8337_data,
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},
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};
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static void __init WPJ563_setup(void)
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{
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u8 *art = (u8 *) KSEG1ADDR(0x1fff0000);
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u8 *mac = (u8 *) KSEG1ADDR(0x1f02e000);
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ath79_register_m25p80(NULL);
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ath79_register_leds_gpio(-1, ARRAY_SIZE(WPJ563_leds_gpio),
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WPJ563_leds_gpio);
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ath79_register_gpio_keys_polled(-1, WPJ563_KEYS_POLL_INTERVAL,
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ARRAY_SIZE(WPJ563_gpio_keys),
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WPJ563_gpio_keys);
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ath79_register_usb();
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ath79_register_wmac(art + WPJ563_WMAC_CALDATA_OFFSET, NULL);
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ath79_register_pci();
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mdiobus_register_board_info(WPJ563_mdio0_info,
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ARRAY_SIZE(WPJ563_mdio0_info));
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ath79_register_mdio(0, 0x0);
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ath79_init_mac(ath79_eth0_data.mac_addr, mac + WPJ563_MAC0_OFFSET, 0);
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ath79_init_mac(ath79_eth1_data.mac_addr, mac + WPJ563_MAC1_OFFSET, 0);
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/* GMAC0 is connected to an QCA8334 switch */
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ath79_eth0_data.phy_if_mode = PHY_INTERFACE_MODE_SGMII;
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ath79_eth0_data.speed = SPEED_1000;
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ath79_eth0_data.duplex = DUPLEX_FULL;
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ath79_eth0_data.phy_mask = BIT(0);
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ath79_eth0_data.mii_bus_dev = &ath79_mdio0_device.dev;
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ath79_register_eth(0);
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}
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MIPS_MACHINE(ATH79_MACH_WPJ563, "WPJ563", "Compex WPJ563", WPJ563_setup);
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