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20ea6adbf1
Build system: x86_64 Build-tested: bcm2708, bcm2709, bcm2710, bcm2711 Run-tested: bcm2708/RPiB+, bcm2709/RPi3B, bcm2710/RPi3B, bcm2711/RPi4B Signed-off-by: Marty Jones <mj8263788@gmail.com> Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
776 lines
22 KiB
Diff
776 lines
22 KiB
Diff
From c218d35ede9474ffa6231e8be88c8ad28044ca2e Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Noralf=20Tr=C3=B8nnes?= <noralf@tronnes.org>
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Date: Wed, 3 Nov 2021 12:21:14 +0100
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Subject: [PATCH] overlays: Add fbtft overlay
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Add an overlay that provides much of the functionality that fbtft_device did.
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Signed-off-by: Noralf Trønnes <noralf@tronnes.org>
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---
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arch/arm/boot/dts/overlays/Makefile | 1 +
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arch/arm/boot/dts/overlays/README | 124 ++++
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arch/arm/boot/dts/overlays/fbtft-overlay.dts | 611 +++++++++++++++++++
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3 files changed, 736 insertions(+)
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create mode 100644 arch/arm/boot/dts/overlays/fbtft-overlay.dts
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--- a/arch/arm/boot/dts/overlays/Makefile
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+++ b/arch/arm/boot/dts/overlays/Makefile
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@@ -49,6 +49,7 @@ dtbo-$(CONFIG_ARCH_BCM2835) += \
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enc28j60.dtbo \
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enc28j60-spi2.dtbo \
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exc3000.dtbo \
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+ fbtft.dtbo \
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fe-pi-audio.dtbo \
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fsm-demo.dtbo \
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ghost-amp.dtbo \
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--- a/arch/arm/boot/dts/overlays/README
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+++ b/arch/arm/boot/dts/overlays/README
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@@ -857,6 +857,130 @@ Params: interrupt GPIO use
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swapxy Touchscreen swapped x y axis
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+Name: fbtft
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+Info: Overlay for SPI-connected displays using the fbtft drivers.
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+
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+ This overlay seeks to replace the functionality provided by fbtft_device
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+ which is now gone from the kernel.
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+
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+ Most displays from fbtft_device have been ported over.
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+ Example:
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+ dtoverlay=fbtft,spi0-0,rpi-display,reset_pin=23,dc_pin=24,led_pin=18,rotate=270
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+
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+ It is also possible to specify the controller (this will use the default
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+ init sequence in the driver).
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+ Example:
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+ dtoverlay=fbtft,spi0-0,ili9341,bgr,reset_pin=23,dc_pin=24,led_pin=18,rotate=270
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+
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+ For devices on spi1 or spi2, the interfaces should be enabled
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+ with one of the spi1-1/2/3cs and/or spi2-1/2/3cs overlays.
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+
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+ The following features of fbtft_device have not been ported over:
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+ - parallel bus is not supported
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+ - the init property which overrides the controller initialization
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+ sequence is not supported as a parameter due to memory limitations in
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+ the bootloader responsible for applying the overlay.
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+
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+ See https://github.com/notro/fbtft/wiki/FBTFT-RPI-overlays for how to
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+ create an overlay.
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+
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+Load: dtoverlay=fbtft,<param>=<val>
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+Params:
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+ spi<n>-<m> Configure device at spi<n>, cs<m>
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+ (boolean, required)
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+ speed SPI bus speed in Hz (default 32000000)
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+ cpha Shifted clock phase (CPHA) mode
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+ cpol Inverse clock polarity (CPOL) mode
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+
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+ adafruit18 Adafruit 1.8
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+ adafruit22 Adafruit 2.2 (old)
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+ adafruit22a Adafruit 2.2
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+ adafruit28 Adafruit 2.8
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+ adafruit13m Adafruit 1.3 OLED
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+ admatec_c-berry28 C-Berry28
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+ dogs102 EA DOGS102
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+ er_tftm050_2 ER-TFTM070-2
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+ er_tftm070_5 ER-TFTM070-5
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+ ew24ha0 EW24HA0
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+ ew24ha0_9bit EW24HA0 in 9-bit mode
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+ freetronicsoled128 Freetronics OLED128
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+ hy28a HY28A
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+ hy28b HY28B
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+ itdb28_spi ITDB02-2.8 with SPI interface circuit
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+ mi0283qt-2 Watterott MI0283QT-2
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+ mi0283qt-9a Watterott MI0283QT-9A
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+ nokia3310 Nokia 3310
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+ nokia3310a Nokia 3310a
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+ nokia5110 Nokia 5110
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+ piscreen PiScreen
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+ pitft Adafruit PiTFT 2.8
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+ pioled ILSoft OLED
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+ rpi-display Watterott rpi-display
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+ sainsmart18 Sainsmart 1.8
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+ sainsmart32_spi Sainsmart 3.2 with SPI interfce circuit
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+ tinylcd35 TinyLCD 3.5
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+ tm022hdh26 Tianma TM022HDH26
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+ tontec35_9481 Tontect 3.5 with ILI9481 controller
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+ tontec35_9486 Tontect 3.5 with ILI9486 controller
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+ waveshare32b Waveshare 3.2
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+ waveshare22 Waveshare 2.2
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+
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+ bd663474 BD663474 display controller
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+ hx8340bn HX8340BN display controller
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+ hx8347d HX8347D display controller
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+ hx8353d HX8353D display controller
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+ hx8357d HX8357D display controller
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+ ili9163 ILI9163 display controller
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+ ili9320 ILI9320 display controller
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+ ili9325 ILI9325 display controller
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+ ili9340 ILI9340 display controller
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+ ili9341 ILI9341 display controller
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+ ili9481 ILI9481 display controller
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+ ili9486 ILI9486 display controller
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+ pcd8544 PCD8544 display controller
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+ ra8875 RA8875 display controller
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+ s6d02a1 S6D02A1 display controller
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+ s6d1121 S6D1121 display controller
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+ seps525 SEPS525 display controller
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+ sh1106 SH1106 display controller
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+ ssd1289 SSD1289 display controller
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+ ssd1305 SSD1305 display controller
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+ ssd1306 SSD1306 display controller
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+ ssd1325 SSD1325 display controller
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+ ssd1331 SSD1331 display controller
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+ ssd1351 SSD1351 display controller
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+ st7735r ST7735R display controller
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+ st7789v ST7789V display controller
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+ tls8204 TLS8204 display controller
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+ uc1611 UC1611 display controller
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+ uc1701 UC1701 display controller
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+ upd161704 UPD161704 display controller
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+
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+ width Display width in pixels
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+ height Display height in pixels
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+ regwidth Display controller register width (default is
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+ driver specific)
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+ buswidth Display bus interface width (default 8)
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+ debug Debug output level {0-7}
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+ rotate Display rotation {0, 90, 180, 270} (counter
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+ clockwise). Not supported by all drivers.
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+ bgr Enable BGR mode (default off). Use if Red and
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+ Blue are swapped. Not supported by all drivers.
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+ fps Frames per second (default 30). In effect this
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+ states how long the driver will wait after video
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+ memory has been changed until display update
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+ transfer is started.
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+ txbuflen Length of the FBTFT transmit buffer
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+ (default 4096)
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+ startbyte Sets the Start byte used by fb_ili9320,
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+ fb_ili9325 and fb_hx8347d. Common value is 0x70.
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+ gamma String representation of Gamma Curve(s). Driver
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+ specific. Not supported by all drivers.
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+ reset_pin GPIO pin for RESET
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+ dc_pin GPIO pin for D/C
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+ led_pin GPIO pin for LED backlight
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+
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+
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Name: fe-pi-audio
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Info: Configures the Fe-Pi Audio Sound Card
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Load: dtoverlay=fe-pi-audio
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--- /dev/null
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+++ b/arch/arm/boot/dts/overlays/fbtft-overlay.dts
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@@ -0,0 +1,611 @@
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+/*
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+ * Device Tree overlay for fbtft drivers
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+ */
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+
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+/dts-v1/;
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+/plugin/;
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+
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+/ {
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+ compatible = "brcm,bcm2835";
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+
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+ /* adafruit18 */
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+ fragment@0 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "sitronix,st7735r";
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+ spi-max-frequency = <32000000>;
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+ gamma = "02 1c 07 12 37 32 29 2d 29 25 2B 39 00 01 03 10\n03 1d 07 06 2E 2C 29 2D 2E 2E 37 3F 00 00 02 10";
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+ };
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+ };
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+
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+ /* adafruit22 */
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+ fragment@1 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "himax,hx8340bn";
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+ spi-max-frequency = <32000000>;
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+ buswidth = <9>;
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+ bgr;
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+ };
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+ };
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+
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+ /* adafruit22a */
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+ fragment@2 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ilitek,ili9340";
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+ spi-max-frequency = <32000000>;
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+ bgr;
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+ };
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+ };
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+
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+ /* adafruit28 */
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+ fragment@3 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ilitek,ili9341";
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+ spi-max-frequency = <32000000>;
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+ bgr;
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+ };
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+ };
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+
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+ /* adafruit13m */
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+ fragment@4 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "solomon,ssd1306";
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+ spi-max-frequency = <16000000>;
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+ };
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+ };
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+
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+ /* admatec_c-berry28 */
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+ fragment@5 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "sitronix,st7789v";
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+ spi-max-frequency = <48000000>;
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+ init = <0x01000011
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+ 0x02000078
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+ 0x0100003A 0x05
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+ 0x010000B2 0x0C 0x0C 0x00 0x33 0x33
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+ 0x010000B7 0x35
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+ 0x010000C2 0x01 0xFF
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+ 0x010000C3 0x17
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+ 0x010000C4 0x20
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+ 0x010000BB 0x17
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+ 0x010000C5 0x20
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+ 0x010000D0 0xA4 0xA1
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+ 0x01000029>;
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+ gamma = "D0 00 14 15 13 2C 42 43 4E 09 16 14 18 21\nD0 00 14 15 13 0B 43 55 53 0C 17 14 23 20";
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+ };
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+ };
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+
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+ /* dogs102 */
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+ fragment@6 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "UltraChip,uc1701";
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+ spi-max-frequency = <8000000>;
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+ bgr;
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+ };
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+ };
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+
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+ /* er_tftm050_2 */
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+ fragment@7 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "raio,ra8875";
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+ spi-max-frequency = <5000000>;
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+ spi-cpha;
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+ spi-cpol;
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+ width = <480>;
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+ height = <272>;
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+ bgr;
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+ };
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+ };
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+
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+ /* er_tftm070_5 */
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+ fragment@8 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "raio,ra8875";
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+ spi-max-frequency = <5000000>;
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+ spi-cpha;
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+ spi-cpol;
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+ width = <800>;
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+ height = <480>;
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+ bgr;
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+ };
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+ };
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+
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+ /* ew24ha0 */
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+ fragment@9 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ultrachip,uc1611";
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+ spi-max-frequency = <32000000>;
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+ spi-cpha;
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+ spi-cpol;
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+ };
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+ };
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+
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+ /* ew24ha0_9bit */
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+ fragment@10 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ultrachip,uc1611";
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+ spi-max-frequency = <32000000>;
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+ spi-cpha;
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+ spi-cpol;
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+ buswidth = <9>;
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+ };
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+ };
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+
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+ /* freetronicsoled128 */
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+ fragment@11 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "solomon,ssd1351";
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+ spi-max-frequency = <20000000>;
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+ backlight = <2>; /* FBTFT_ONBOARD_BACKLIGHT */
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+ bgr;
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+ };
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+ };
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+
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+ /* hy28a */
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+ fragment@12 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ilitek,ili9320";
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+ spi-max-frequency = <32000000>;
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+ spi-cpha;
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+ spi-cpol;
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+ startbyte = <0x70>;
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+ bgr;
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+ };
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+ };
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+
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+ /* hy28b */
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+ fragment@13 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ilitek,ili9325";
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+ spi-max-frequency = <48000000>;
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+ spi-cpha;
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+ spi-cpol;
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+ init = <0x010000e7 0x0010
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+ 0x01000000 0x0001
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+ 0x01000001 0x0100
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+ 0x01000002 0x0700
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+ 0x01000003 0x1030
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+ 0x01000004 0x0000
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+ 0x01000008 0x0207
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+ 0x01000009 0x0000
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+ 0x0100000a 0x0000
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+ 0x0100000c 0x0001
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+ 0x0100000d 0x0000
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+ 0x0100000f 0x0000
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+ 0x01000010 0x0000
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+ 0x01000011 0x0007
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+ 0x01000012 0x0000
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+ 0x01000013 0x0000
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+ 0x02000032
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+ 0x01000010 0x1590
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+ 0x01000011 0x0227
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+ 0x02000032
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+ 0x01000012 0x009c
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+ 0x02000032
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+ 0x01000013 0x1900
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+ 0x01000029 0x0023
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+ 0x0100002b 0x000e
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+ 0x02000032
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+ 0x01000020 0x0000
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+ 0x01000021 0x0000
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+ 0x02000032
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+ 0x01000050 0x0000
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+ 0x01000051 0x00ef
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+ 0x01000052 0x0000
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+ 0x01000053 0x013f
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+ 0x01000060 0xa700
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+ 0x01000061 0x0001
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+ 0x0100006a 0x0000
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+ 0x01000080 0x0000
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+ 0x01000081 0x0000
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+ 0x01000082 0x0000
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+ 0x01000083 0x0000
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+ 0x01000084 0x0000
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+ 0x01000085 0x0000
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+ 0x01000090 0x0010
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+ 0x01000092 0x0000
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+ 0x01000093 0x0003
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+ 0x01000095 0x0110
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+ 0x01000097 0x0000
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+ 0x01000098 0x0000
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+ 0x01000007 0x0133
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+ 0x01000020 0x0000
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+ 0x01000021 0x0000
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+ 0x02000064>;
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+ startbyte = <0x70>;
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+ bgr;
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+ fps = <50>;
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+ gamma = "04 1F 4 7 7 0 7 7 6 0\n0F 00 1 7 4 0 0 0 6 7";
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+ };
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+ };
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+
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+ /* itdb28_spi */
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+ fragment@14 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ilitek,ili9325";
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+ spi-max-frequency = <32000000>;
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+ bgr;
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+ };
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+ };
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+
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+ /* mi0283qt-2 */
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+ fragment@15 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "himax,hx8347d";
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+ spi-max-frequency = <32000000>;
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+ startbyte = <0x70>;
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+ bgr;
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+ };
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+ };
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+
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+ /* mi0283qt-9a */
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+ fragment@16 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ilitek,ili9341";
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+ spi-max-frequency = <32000000>;
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+ buswidth = <9>;
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+ bgr;
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+ };
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+ };
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+
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+ /* nokia3310 */
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+ fragment@17 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "philips,pcd8544";
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+ spi-max-frequency = <400000>;
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+ };
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+ };
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+
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+ /* nokia3310a */
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+ fragment@18 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "teralane,tls8204";
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+ spi-max-frequency = <1000000>;
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+ };
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+ };
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+
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+ /* nokia5110 */
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+ fragment@19 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ilitek,ili9163";
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+ spi-max-frequency = <12000000>;
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+ bgr;
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+ };
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+ };
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+
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+ /* piscreen */
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+ fragment@20 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ilitek,ili9486";
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+ spi-max-frequency = <32000000>;
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+ regwidth = <16>;
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+ bgr;
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+ };
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+ };
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+
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+ /* pitft */
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+ fragment@21 {
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+ target = <&display>;
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+ __dormant__ {
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+ compatible = "ilitek,ili9340";
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+ spi-max-frequency = <32000000>;
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+ init = <0x01000001
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+ 0x02000005
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+ 0x01000028
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+ 0x010000EF 0x03 0x80 0x02
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|
+ 0x010000CF 0x00 0xC1 0x30
|
|
+ 0x010000ED 0x64 0x03 0x12 0x81
|
|
+ 0x010000E8 0x85 0x00 0x78
|
|
+ 0x010000CB 0x39 0x2C 0x00 0x34 0x02
|
|
+ 0x010000F7 0x20
|
|
+ 0x010000EA 0x00 0x00
|
|
+ 0x010000C0 0x23
|
|
+ 0x010000C1 0x10
|
|
+ 0x010000C5 0x3E 0x28
|
|
+ 0x010000C7 0x86
|
|
+ 0x0100003A 0x55
|
|
+ 0x010000B1 0x00 0x18
|
|
+ 0x010000B6 0x08 0x82 0x27
|
|
+ 0x010000F2 0x00
|
|
+ 0x01000026 0x01
|
|
+ 0x010000E0 0x0F 0x31 0x2B 0x0C 0x0E 0x08 0x4E 0xF1 0x37 0x07 0x10 0x03 0x0E 0x09 0x00
|
|
+ 0x010000E1 0x00 0x0E 0x14 0x03 0x11 0x07 0x31 0xC1 0x48 0x08 0x0F 0x0C 0x31 0x36 0x0F
|
|
+ 0x01000011
|
|
+ 0x02000064
|
|
+ 0x01000029
|
|
+ 0x02000014>;
|
|
+ bgr;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* pioled */
|
|
+ fragment@22 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "solomon,ssd1351";
|
|
+ spi-max-frequency = <20000000>;
|
|
+ bgr;
|
|
+ gamma = "0 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 2 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 3 4 4 4 4 4 4 4 4 4 4 4 4";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* rpi-display */
|
|
+ fragment@23 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "ilitek,ili9341";
|
|
+ spi-max-frequency = <32000000>;
|
|
+ bgr;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* sainsmart18 */
|
|
+ fragment@24 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "sitronix,st7735r";
|
|
+ spi-max-frequency = <32000000>;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* sainsmart32_spi */
|
|
+ fragment@25 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "solomon,ssd1289";
|
|
+ spi-max-frequency = <16000000>;
|
|
+ bgr;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* tinylcd35 */
|
|
+ fragment@26 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "neosec,tinylcd";
|
|
+ spi-max-frequency = <32000000>;
|
|
+ bgr;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* tm022hdh26 */
|
|
+ fragment@27 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "ilitek,ili9341";
|
|
+ spi-max-frequency = <32000000>;
|
|
+ bgr;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* tontec35_9481 - boards before 02 July 2014 */
|
|
+ fragment@28 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "ilitek,ili9481";
|
|
+ spi-max-frequency = <128000000>;
|
|
+ spi-cpha;
|
|
+ spi-cpol;
|
|
+ bgr;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* tontec35_9486 - boards after 02 July 2014 */
|
|
+ fragment@29 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "ilitek,ili9486";
|
|
+ spi-max-frequency = <128000000>;
|
|
+ spi-cpha;
|
|
+ spi-cpol;
|
|
+ bgr;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* waveshare32b */
|
|
+ fragment@30 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "ilitek,ili9340";
|
|
+ spi-max-frequency = <48000000>;
|
|
+ init = <0x010000CB 0x39 0x2C 0x00 0x34 0x02
|
|
+ 0x010000CF 0x00 0xC1 0x30
|
|
+ 0x010000E8 0x85 0x00 0x78
|
|
+ 0x010000EA 0x00 0x00
|
|
+ 0x010000ED 0x64 0x03 0x12 0x81
|
|
+ 0x010000F7 0x20
|
|
+ 0x010000C0 0x23
|
|
+ 0x010000C1 0x10
|
|
+ 0x010000C5 0x3E 0x28
|
|
+ 0x010000C7 0x86
|
|
+ 0x01000036 0x28
|
|
+ 0x0100003A 0x55
|
|
+ 0x010000B1 0x00 0x18
|
|
+ 0x010000B6 0x08 0x82 0x27
|
|
+ 0x010000F2 0x00
|
|
+ 0x01000026 0x01
|
|
+ 0x010000E0 0x0F 0x31 0x2B 0x0C 0x0E 0x08 0x4E 0xF1 0x37 0x07 0x10 0x03 0x0E 0x09 0x00
|
|
+ 0x010000E1 0x00 0x0E 0x14 0x03 0x11 0x07 0x31 0xC1 0x48 0x08 0x0F 0x0C 0x31 0x36 0x0F
|
|
+ 0x01000011
|
|
+ 0x02000078
|
|
+ 0x01000029
|
|
+ 0x0100002C>;
|
|
+ bgr;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ /* waveshare22 */
|
|
+ fragment@31 {
|
|
+ target = <&display>;
|
|
+ __dormant__ {
|
|
+ compatible = "hitachi,bd663474";
|
|
+ spi-max-frequency = <32000000>;
|
|
+ spi-cpha;
|
|
+ spi-cpol;
|
|
+ };
|
|
+ };
|
|
+
|
|
+ spidev_fragment: fragment@100 {
|
|
+ target-path = "spi0/spidev@0";
|
|
+ __overlay__ {
|
|
+ status = "disabled";
|
|
+ };
|
|
+ };
|
|
+
|
|
+ display_fragment: fragment@101 {
|
|
+ target = <&spi0>;
|
|
+ __overlay__ {
|
|
+ /* needed to avoid dtc warning */
|
|
+ #address-cells = <1>;
|
|
+ #size-cells = <0>;
|
|
+
|
|
+ status = "okay";
|
|
+
|
|
+ display: display@0{
|
|
+ reg = <0>;
|
|
+ spi-max-frequency = <32000000>;
|
|
+ fps = <30>;
|
|
+ buswidth = <8>;
|
|
+ };
|
|
+ };
|
|
+ };
|
|
+
|
|
+ __overrides__ {
|
|
+ spi0-0 = <&display_fragment>, "target:0=",<&spi0>,
|
|
+ <&spidev_fragment>, "target-path=spi0/spidev@0",
|
|
+ <&display>, "reg:0=0";
|
|
+ spi0-1 = <&display_fragment>, "target:0=",<&spi0>,
|
|
+ <&spidev_fragment>, "target-path=spi0/spidev@1",
|
|
+ <&display>, "reg:0=1";
|
|
+ spi1-0 = <&display_fragment>, "target:0=",<&spi1>,
|
|
+ <&spidev_fragment>, "target-path=spi1/spidev@0",
|
|
+ <&display>, "reg:0=0";
|
|
+ spi1-1 = <&display_fragment>, "target:0=",<&spi1>,
|
|
+ <&spidev_fragment>, "target-path=spi1/spidev@1",
|
|
+ <&display>, "reg:0=1";
|
|
+ spi1-2 = <&display_fragment>, "target:0=",<&spi1>,
|
|
+ <&spidev_fragment>, "target-path=spi1/spidev@2",
|
|
+ <&display>, "reg:0=2";
|
|
+ spi2-0 = <&display_fragment>, "target:0=",<&spi2>,
|
|
+ <&spidev_fragment>, "target-path=spi2/spidev@0",
|
|
+ <&display>, "reg:0=0";
|
|
+ spi2-1 = <&display_fragment>, "target:0=",<&spi2>,
|
|
+ <&spidev_fragment>, "target-path=spi2/spidev@1",
|
|
+ <&display>, "reg:0=1";
|
|
+ spi2-2 = <&display_fragment>, "target:0=",<&spi2>,
|
|
+ <&spidev_fragment>, "target-path=spi2/spidev@2",
|
|
+ <&display>, "reg:0=2";
|
|
+
|
|
+ speed = <&display>, "spi-max-frequency:0";
|
|
+ cpha = <&display>, "spi-cpha?";
|
|
+ cpol = <&display>, "spi-cpol?";
|
|
+
|
|
+ /* Displays */
|
|
+ adafruit18 = <0>, "+0";
|
|
+ adafruit22 = <0>, "+1";
|
|
+ adafruit22a = <0>, "+2";
|
|
+ adafruit28 = <0>, "+3";
|
|
+ adafruit13m = <0>, "+4";
|
|
+ admatec_c-berry28 = <0>, "+5";
|
|
+ dogs102 = <0>, "+6";
|
|
+ er_tftm050_2 = <0>, "+7";
|
|
+ er_tftm070_5 = <0>, "+8";
|
|
+ ew24ha0 = <0>, "+9";
|
|
+ ew24ha0_9bit = <0>, "+10";
|
|
+ freetronicsoled128 = <0>, "+11";
|
|
+ hy28a = <0>, "+12";
|
|
+ hy28b = <0>, "+13";
|
|
+ itdb28_spi = <0>, "+14";
|
|
+ mi0283qt-2 = <0>, "+15";
|
|
+ mi0283qt-9a = <0>, "+16";
|
|
+ nokia3310 = <0>, "+17";
|
|
+ nokia3310a = <0>, "+18";
|
|
+ nokia5110 = <0>, "+19";
|
|
+ piscreen = <0>, "+20";
|
|
+ pitft = <0>, "+21";
|
|
+ pioled = <0>, "+22";
|
|
+ rpi-display = <0>, "+23";
|
|
+ sainsmart18 = <0>, "+24";
|
|
+ sainsmart32_spi = <0>, "+25";
|
|
+ tinylcd35 = <0>, "+26";
|
|
+ tm022hdh26 = <0>, "+27";
|
|
+ tontec35_9481 = <0>, "+28";
|
|
+ tontec35_9486 = <0>, "+29";
|
|
+ waveshare32b = <0>, "+30";
|
|
+ waveshare22 = <0>, "+31";
|
|
+
|
|
+ /* Controllers */
|
|
+ bd663474 = <&display>, "compatible=hitachi,bd663474";
|
|
+ hx8340bn = <&display>, "compatible=himax,hx8340bn";
|
|
+ hx8347d = <&display>, "compatible=himax,hx8347d";
|
|
+ hx8353d = <&display>, "compatible=himax,hx8353d";
|
|
+ hx8357d = <&display>, "compatible=himax,hx8357d";
|
|
+ ili9163 = <&display>, "compatible=ilitek,ili9163";
|
|
+ ili9320 = <&display>, "compatible=ilitek,ili9320";
|
|
+ ili9325 = <&display>, "compatible=ilitek,ili9325";
|
|
+ ili9340 = <&display>, "compatible=ilitek,ili9340";
|
|
+ ili9341 = <&display>, "compatible=ilitek,ili9341";
|
|
+ ili9481 = <&display>, "compatible=ilitek,ili9481";
|
|
+ ili9486 = <&display>, "compatible=ilitek,ili9486";
|
|
+ pcd8544 = <&display>, "compatible=philips,pcd8544";
|
|
+ ra8875 = <&display>, "compatible=raio,ra8875";
|
|
+ s6d02a1 = <&display>, "compatible=samsung,s6d02a1";
|
|
+ s6d1121 = <&display>, "compatible=samsung,s6d1121";
|
|
+ seps525 = <&display>, "compatible=syncoam,seps525";
|
|
+ sh1106 = <&display>, "compatible=sinowealth,sh1106";
|
|
+ ssd1289 = <&display>, "compatible=solomon,ssd1289";
|
|
+ ssd1305 = <&display>, "compatible=solomon,ssd1305";
|
|
+ ssd1306 = <&display>, "compatible=solomon,ssd1306";
|
|
+ ssd1325 = <&display>, "compatible=solomon,ssd1325";
|
|
+ ssd1331 = <&display>, "compatible=solomon,ssd1331";
|
|
+ ssd1351 = <&display>, "compatible=solomon,ssd1351";
|
|
+ st7735r = <&display>, "compatible=sitronix,st7735r";
|
|
+ st7789v = <&display>, "compatible=sitronix,st7789v";
|
|
+ tls8204 = <&display>, "compatible=teralane,tls8204";
|
|
+ uc1611 = <&display>, "compatible=ultrachip,uc1611";
|
|
+ uc1701 = <&display>, "compatible=UltraChip,uc1701";
|
|
+ upd161704 = <&display>, "compatible=nec,upd161704";
|
|
+
|
|
+ width = <&display>, "width:0";
|
|
+ height = <&display>, "height:0";
|
|
+ regwidth = <&display>, "regwidth:0";
|
|
+ buswidth = <&display>, "buswidth:0";
|
|
+ debug = <&display>, "debug:0";
|
|
+ rotate = <&display>, "rotate:0";
|
|
+ bgr = <&display>, "bgr?";
|
|
+ fps = <&display>, "fps:0";
|
|
+ txbuflen = <&display>, "txbuflen:0";
|
|
+ startbyte = <&display>, "startbyte:0";
|
|
+ gamma = <&display>, "gamma";
|
|
+
|
|
+ reset_pin = <&display>, "reset-gpios:0=", <&gpio>,
|
|
+ <&display>, "reset-gpios:4",
|
|
+ <&display>, "reset-gpios:8=1"; /* GPIO_ACTIVE_LOW */
|
|
+ dc_pin = <&display>, "dc-gpios:0=", <&gpio>,
|
|
+ <&display>, "dc-gpios:4",
|
|
+ <&display>, "dc-gpios:8=0"; /* GPIO_ACTIVE_HIGH */
|
|
+ led_pin = <&display>, "led-gpios:0=", <&gpio>,
|
|
+ <&display>, "led-gpios:4",
|
|
+ <&display>, "led-gpios:8=0"; /* GPIO_ACTIVE_HIGH */
|
|
+ };
|
|
+};
|