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635f111148
In ath79, for several SoCs the console bootargs are defined to the very same value in every device's DTS. Consolidate these definitions in the SoC dtsi files and drop further redundant definitions elsewhere. The only device without any bootargs set has been OpenMesh OM5P-AC V2. This will now inherit the setting from qca955x.dtsi Note that while this tidies up master a lot, it might develop into a frequent pitfall for backports. Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
136 lines
2.1 KiB
Plaintext
136 lines
2.1 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "qca956x.dtsi"
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/ {
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keys {
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compatible = "gpio-keys";
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wps {
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linux,code = <KEY_WPS_BUTTON>;
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gpios = <&gpio 1 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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reset {
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 2 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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};
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&uart {
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status = "okay";
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};
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&pcie {
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status = "okay";
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};
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&spi {
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status = "okay";
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num-cs = <1>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <50000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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partition@0 {
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label = "u-boot";
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reg = <0x000000 0x40000>;
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read-only;
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};
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partition@40000 {
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label = "u-boot-env";
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reg = <0x040000 0x10000>;
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read-only;
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};
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partition@50000 {
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label = "devdata";
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reg = <0x050000 0x10000>;
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read-only;
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};
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partition@60000 {
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label = "devconf";
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reg = <0x060000 0x10000>;
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read-only;
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};
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partition@70000 {
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label = "misc";
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reg = <0x070000 0x10000>;
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read-only;
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};
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partition@80000 {
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compatible = "seama";
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label = "firmware";
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reg = <0x080000 0xf50000>;
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};
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art: partition@fd0000 {
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label = "art";
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reg = <0xfd0000 0x010000>;
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read-only;
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};
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partition@fe0000 {
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label = "reserved";
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reg = <0xfe0000 0x20000>;
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read-only;
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};
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};
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};
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};
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&mdio0 {
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status = "okay";
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phy-mask = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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qca,mib-poll-interval = <500>;
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reset-gpios = <&gpio 11 GPIO_ACTIVE_LOW>;
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qca,ar8327-initvals = <
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0x04 0x00080080 /* PORT0 PAD MODE CTRL */
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0x10 0x81000080 /* POWER_ON_STRIP */
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0x50 0xcc35cc35 /* LED_CTRL0 */
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0x54 0xcb37cb37 /* LED_CTRL1 */
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0x58 0x00000000 /* LED_CTRL2 */
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0x5c 0x00f3cf00 /* LED_CTRL3 */
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0x7c 0x0000007e /* PORT0_STATUS */
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>;
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};
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};
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ð0 {
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status = "okay";
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pll-data = <0x03000101 0x00000101 0x00001919>;
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phy-mode = "sgmii";
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phy-handle = <&phy0>;
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};
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&wmac {
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status = "okay";
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qca,no-eeprom;
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};
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