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a0bb356612
Specifications: SoC: AR9344 DRAM: 128MB DDR2 Flash: 16MB SPI-NOR 2 Gigabit ethernet ports 2×2 2.4GHz on-board radio miniPCIe slot that supports 5GHz radio PoE 48V IEEE 802.3af/at - 24V passive optional USB 2.0 header Installation: To install, either start tftp in bin/targets/ath79/generic/ and use the u-boot prompt over UART: tftpboot 0x80500000 openwrt-ath79-generic-compex_wpj344-16m-squashfs-sysupgrade.bin erase 0x9f030000 +$filesize erase 0x9f680000 +1 cp.b $fileaddr 0x9f030000 $filesize boot The cpximg file can be used with sysupgrade in the stock firmware (add SSH key in luci for root access) or with the built-in cpximg loader. The cpximg loader can be started either by holding the reset button during power up or by entering the u-boot prompt and entering 'cpximg'. Once it's running, a TFTP-server under 192.168.1.1 will accept the image appropriate for the board revision that is etched on the board. For example, if the board is labelled '6A08': tftp -v -m binary 192.168.1.1 -c put openwrt-ath79-generic-compex_wpj344-16m-squashfs-cpximg-6a08.bin MAC addresses: <&uboot 0x2e010> *:99 (label) <&uboot 0x2e018> *:9a <&uboot 0x2e020> *:9b <&uboot 0x2e028> *:9c Only the first two are used (for ethernet), the WiFi modules have separate (valid) addresses. The latter two addresses are not used. Signed-off-by: Leon M. George <leon@georgemail.eu> [minor commit message adjustments, drop gpio in DTS, DTS style fixes, sorting, drop unused cpximg recipe] Signed-off-by: Adrian Schmutzler <freifunk@adrianschmutzler.de>
154 lines
2.4 KiB
Plaintext
154 lines
2.4 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
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/dts-v1/;
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#include <dt-bindings/gpio/gpio.h>
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#include <dt-bindings/input/input.h>
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#include "ar9344.dtsi"
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/ {
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compatible = "compex,wpj344-16m", "qca,ar9344";
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model = "Compex WPJ344 (16MB flash)";
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aliases {
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label-mac-device = ð0;
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led-boot = &led_status;
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led-failsafe = &led_status;
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led-running = &led_status;
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led-upgrade = &led_status;
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};
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leds {
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compatible = "gpio-leds";
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led_status: status {
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label = "wpj344:green:status";
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gpios = <&gpio 14 GPIO_ACTIVE_LOW>;
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};
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sig1 {
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label = "wpj344:red:sig1";
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gpios = <&gpio 15 GPIO_ACTIVE_LOW>;
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};
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sig2 {
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label = "wpj344:yellow:sig2";
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gpios = <&gpio 20 GPIO_ACTIVE_LOW>;
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};
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sig3 {
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label = "wpj344:green:sig3";
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gpios = <&gpio 21 GPIO_ACTIVE_LOW>;
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};
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sig4 {
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label = "wpj344:green:sig4";
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gpios = <&gpio 22 GPIO_ACTIVE_LOW>;
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};
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};
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keys {
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compatible = "gpio-keys";
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reset {
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linux,code = <KEY_RESTART>;
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gpios = <&gpio 12 GPIO_ACTIVE_LOW>;
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debounce-interval = <60>;
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};
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};
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};
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&ref {
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clock-frequency = <40000000>;
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};
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&uart {
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status = "okay";
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};
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&spi {
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status = "okay";
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num-cs = <1>;
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flash@0 {
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compatible = "jedec,spi-nor";
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reg = <0>;
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spi-max-frequency = <25000000>;
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partitions {
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compatible = "fixed-partitions";
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#address-cells = <1>;
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#size-cells = <1>;
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uboot: partition@0 {
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label = "u-boot";
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reg = <0x000000 0x030000>;
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read-only;
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};
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partition@30000 {
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label = "firmware";
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reg = <0x030000 0xfc0000>;
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compatible = "denx,uimage";
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};
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art: partition@ff0000 {
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label = "art";
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reg = <0xff0000 0x010000>;
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read-only;
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};
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};
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};
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};
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&usb {
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status = "okay";
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};
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&usb_phy {
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status = "okay";
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};
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&pcie {
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status = "okay";
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};
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&wmac {
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status = "okay";
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mtd-cal-data = <&art 0x1000>;
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};
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&mdio0 {
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status = "okay";
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phy-mask = <0>;
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phy0: ethernet-phy@0 {
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reg = <0>;
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phy-mode = "rgmii";
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qca,ar8327-initvals = <
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0x04 0x07600000 /* PORT0 PAD MODE CTRL */
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0x10 0x80000080 /* POWER_ON_STRIP */
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0x50 0x00000000 /* LED_CTRL0 */
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0x54 0xc737c737 /* LED_CTRL1 */
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0x58 0x00000000 /* LED_CTRL2 */
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0x5c 0x00c30c00 /* LED_CTRL3 */
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0x7c 0x0000007e /* PORT0_STATUS */
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>;
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};
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};
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ð0 {
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status = "okay";
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pll-data = <0x06000000 0x00000101 0x00001616>;
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mtd-mac-address = <&uboot 0x2e010>;
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phy-mode = "rgmii";
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phy-handle = <&phy0>;
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};
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