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7f0e1373f4
Pick accepted patches from upstream Linux tree instead of having to
maintain our slightly different downstream patches.
Import pending patch fixing I2C on MT7981 by making sure all clocks
are enabled before accessing I2C registers.
Signed-off-by: Daniel Golle <daniel@makrotopia.org>
(cherry picked from commit 213b728276)
133 lines
4.1 KiB
Diff
133 lines
4.1 KiB
Diff
From f606aab3f1a49d723d66e14e545f6ca45005bda6 Mon Sep 17 00:00:00 2001
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From: Kewei Xu <kewei.xu@mediatek.com>
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Date: Thu, 17 Feb 2022 20:22:43 +0800
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Subject: [PATCH 04/16] i2c: mediatek: modify bus speed calculation formula
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When clock-div is 0 or greater than 1, the bus speed
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calculated by the old speed calculation formula will be
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larger than the target speed. So we update the formula.
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Signed-off-by: Kewei Xu <kewei.xu@mediatek.com>
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Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
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Reviewed-by: Qii Wang <qii.wang@mediatek.com>
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Signed-off-by: Wolfram Sang <wsa@kernel.org>
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---
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drivers/i2c/busses/i2c-mt65xx.c | 51 ++++++++++++++++++++++++++-------
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1 file changed, 41 insertions(+), 10 deletions(-)
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--- a/drivers/i2c/busses/i2c-mt65xx.c
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+++ b/drivers/i2c/busses/i2c-mt65xx.c
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@@ -67,11 +67,12 @@
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#define MAX_SAMPLE_CNT_DIV 8
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#define MAX_STEP_CNT_DIV 64
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-#define MAX_CLOCK_DIV 256
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+#define MAX_CLOCK_DIV_8BITS 256
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+#define MAX_CLOCK_DIV_5BITS 32
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#define MAX_HS_STEP_CNT_DIV 8
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-#define I2C_STANDARD_MODE_BUFFER (1000 / 2)
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-#define I2C_FAST_MODE_BUFFER (300 / 2)
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-#define I2C_FAST_MODE_PLUS_BUFFER (20 / 2)
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+#define I2C_STANDARD_MODE_BUFFER (1000 / 3)
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+#define I2C_FAST_MODE_BUFFER (300 / 3)
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+#define I2C_FAST_MODE_PLUS_BUFFER (20 / 3)
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#define I2C_CONTROL_RS (0x1 << 1)
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#define I2C_CONTROL_DMA_EN (0x1 << 2)
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@@ -604,6 +605,31 @@ static int mtk_i2c_max_step_cnt(unsigned
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return MAX_STEP_CNT_DIV;
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}
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+static int mtk_i2c_get_clk_div_restri(struct mtk_i2c *i2c,
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+ unsigned int sample_cnt)
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+{
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+ int clk_div_restri = 0;
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+
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+ if (i2c->dev_comp->ltiming_adjust == 0)
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+ return 0;
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+
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+ if (sample_cnt == 1) {
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+ if (i2c->ac_timing.inter_clk_div == 0)
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+ clk_div_restri = 0;
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+ else
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+ clk_div_restri = 1;
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+ } else {
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+ if (i2c->ac_timing.inter_clk_div == 0)
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+ clk_div_restri = -1;
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+ else if (i2c->ac_timing.inter_clk_div == 1)
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+ clk_div_restri = 0;
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+ else
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+ clk_div_restri = 1;
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+ }
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+
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+ return clk_div_restri;
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+}
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+
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/*
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* Check and Calculate i2c ac-timing
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*
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@@ -732,6 +758,7 @@ static int mtk_i2c_calculate_speed(struc
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unsigned int best_mul;
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unsigned int cnt_mul;
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int ret = -EINVAL;
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+ int clk_div_restri = 0;
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if (target_speed > I2C_MAX_HIGH_SPEED_MODE_FREQ)
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target_speed = I2C_MAX_HIGH_SPEED_MODE_FREQ;
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@@ -749,7 +776,8 @@ static int mtk_i2c_calculate_speed(struc
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* optimizing for sample_cnt * step_cnt being minimal
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*/
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for (sample_cnt = 1; sample_cnt <= MAX_SAMPLE_CNT_DIV; sample_cnt++) {
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- step_cnt = DIV_ROUND_UP(opt_div, sample_cnt);
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+ clk_div_restri = mtk_i2c_get_clk_div_restri(i2c, sample_cnt);
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+ step_cnt = DIV_ROUND_UP(opt_div + clk_div_restri, sample_cnt);
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cnt_mul = step_cnt * sample_cnt;
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if (step_cnt > max_step_cnt)
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continue;
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@@ -763,7 +791,7 @@ static int mtk_i2c_calculate_speed(struc
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best_mul = cnt_mul;
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base_sample_cnt = sample_cnt;
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base_step_cnt = step_cnt;
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- if (best_mul == opt_div)
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+ if (best_mul == (opt_div + clk_div_restri))
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break;
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}
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}
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@@ -774,7 +802,8 @@ static int mtk_i2c_calculate_speed(struc
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sample_cnt = base_sample_cnt;
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step_cnt = base_step_cnt;
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- if ((clk_src / (2 * sample_cnt * step_cnt)) > target_speed) {
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+ if ((clk_src / (2 * (sample_cnt * step_cnt - clk_div_restri))) >
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+ target_speed) {
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/* In this case, hardware can't support such
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* low i2c_bus_freq
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*/
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@@ -803,13 +832,16 @@ static int mtk_i2c_set_speed(struct mtk_
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target_speed = i2c->speed_hz;
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parent_clk /= i2c->clk_src_div;
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- if (i2c->dev_comp->timing_adjust)
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- max_clk_div = MAX_CLOCK_DIV;
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+ if (i2c->dev_comp->timing_adjust && i2c->dev_comp->ltiming_adjust)
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+ max_clk_div = MAX_CLOCK_DIV_5BITS;
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+ else if (i2c->dev_comp->timing_adjust)
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+ max_clk_div = MAX_CLOCK_DIV_8BITS;
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else
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max_clk_div = 1;
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for (clk_div = 1; clk_div <= max_clk_div; clk_div++) {
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clk_src = parent_clk / clk_div;
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+ i2c->ac_timing.inter_clk_div = clk_div - 1;
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if (target_speed > I2C_MAX_FAST_MODE_PLUS_FREQ) {
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/* Set master code speed register */
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@@ -856,7 +888,6 @@ static int mtk_i2c_set_speed(struct mtk_
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break;
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}
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- i2c->ac_timing.inter_clk_div = clk_div - 1;
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return 0;
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}
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