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157 lines
3.5 KiB
C
157 lines
3.5 KiB
C
/*
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* arch/arm/mach-mx6/msi.c
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*
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* PCI MSI support for the imx processor
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*
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* Copyright (c) 2013, Boundary Devices.
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*
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* This program is free software; you can redistribute it and/or modify it
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* under the terms and conditions of the GNU General Public License,
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* version 2, as published by the Free Software Foundation.
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*
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* This program is distributed in the hope it will be useful, but WITHOUT
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* ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
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* FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
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* more details.
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*
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* You should have received a copy of the GNU General Public License along with
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* this program; if not, write to the Free Software Foundation, Inc., 59 Temple
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* Place - Suite 330, Boston, MA 02111-1307 USA.
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*
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*/
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#include <linux/module.h>
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#include <linux/pci.h>
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#include <linux/msi.h>
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#include <asm/bitops.h>
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#include <asm/mach/irq.h>
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#include <asm/irq.h>
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#include <linux/irqchip/chained_irq.h>
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#include "hardware.h"
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#include "msi.h"
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#define IMX_NUM_MSI_IRQS 128
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static DECLARE_BITMAP(msi_irq_in_use, IMX_NUM_MSI_IRQS);
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static int irq_base;
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static void imx_msi_handler(unsigned int irq, struct irq_desc *desc)
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{
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int i, j;
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unsigned status;
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struct irq_chip *chip = irq_get_chip(irq);
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irq_base = irq_alloc_descs(-1, 0, IMX_NUM_MSI_IRQS, 0);
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if (irq_base < 0) {
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printk(KERN_ERR "%s: could not allocate IRQ numbers\n", __func__);
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return;
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}
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chained_irq_enter(chip, desc);
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for (i = 0; i < 8; i++) {
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status = imx_pcie_msi_pending(i);
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while (status) {
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j = __fls(status);
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generic_handle_irq(irq_base + j);
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status &= ~(1 << j);
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}
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irq_base += 32;
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}
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chained_irq_exit(chip, desc);
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}
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/*
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* Dynamic irq allocate and deallocation
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*/
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int create_irq(void)
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{
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int irq, pos;
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do {
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pos = find_first_zero_bit(msi_irq_in_use, IMX_NUM_MSI_IRQS);
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if ((unsigned)pos >= IMX_NUM_MSI_IRQS)
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return -ENOSPC;
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/* test_and_set_bit operates on 32-bits at a time */
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} while (test_and_set_bit(pos, msi_irq_in_use));
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irq = irq_base + pos;
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dynamic_irq_init(irq);
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return irq;
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}
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void destroy_irq(unsigned int irq)
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{
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int pos = irq - irq_base;
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dynamic_irq_cleanup(irq);
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clear_bit(pos, msi_irq_in_use);
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}
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void arch_teardown_msi_irq(unsigned int irq)
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{
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destroy_irq(irq);
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}
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static void imx_msi_irq_ack(struct irq_data *d)
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{
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return;
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}
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static void imx_msi_irq_enable(struct irq_data *d)
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{
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imx_pcie_enable_irq(d->irq - irq_base, 1);
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return unmask_msi_irq(d);
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}
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static void imx_msi_irq_disable(struct irq_data *d)
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{
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imx_pcie_enable_irq(d->irq - irq_base, 0);
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return mask_msi_irq(d);
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}
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static void imx_msi_irq_mask(struct irq_data *d)
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{
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imx_pcie_mask_irq(d->irq - irq_base, 1);
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return mask_msi_irq(d);
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}
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static void imx_msi_irq_unmask(struct irq_data *d)
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{
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imx_pcie_mask_irq(d->irq - irq_base, 0);
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return unmask_msi_irq(d);
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}
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static struct irq_chip imx_msi_chip = {
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.name = "PCIe-MSI",
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.irq_ack = imx_msi_irq_ack,
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.irq_enable = imx_msi_irq_enable,
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.irq_disable = imx_msi_irq_disable,
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.irq_mask = imx_msi_irq_mask,
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.irq_unmask = imx_msi_irq_unmask,
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};
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int arch_setup_msi_irq(struct pci_dev *pdev, struct msi_desc *desc)
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{
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int irq = create_irq();
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struct msi_msg msg;
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if (irq < 0)
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return irq;
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irq_set_msi_desc(irq, desc);
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msg.address_hi = 0x0;
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msg.address_lo = MSI_MATCH_ADDR;
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msg.data = (mxc_cpu_type << 15) | ((irq - irq_base) & 0xff);
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write_msi_msg(irq, &msg);
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irq_set_chip_and_handler(irq, &imx_msi_chip, handle_simple_irq);
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set_irq_flags(irq, IRQF_VALID);
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pr_info("%s: %d of %d\n", __func__, irq, NR_IRQS);
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return 0;
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}
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void imx_msi_init(void)
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{
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irq_set_chained_handler(MXC_INT_PCIE_0, imx_msi_handler);
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}
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