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https://github.com/openwrt/openwrt.git
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8c405cdccc
The patches were generated from the RPi repo with the following command: git format-patch v6.6.34..rpi-6.1.y Some patches needed rebasing and, as usual, the applied and reverted, wireless drivers, Github workflows, READMEs and defconfigs patches were removed. Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
329 lines
12 KiB
Diff
329 lines
12 KiB
Diff
From 272ac64c598d83c4025393398b431db0a4656a74 Mon Sep 17 00:00:00 2001
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From: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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Date: Tue, 23 Jan 2024 18:45:51 +0000
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Subject: [PATCH 0874/1085] drm: rp1: Use tv_mode from the command line and fix
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for Linux 6.6
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Use the standard enum drm_connector_tv_mode instead of a private
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enum and switch from the legacy to the standard tv_mode property.
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Remove the module parameter "tv_norm". Instead, get tv_mode from
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the command line and make this the connector's default TV mode.
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Don't restrict the choice of modes based on tv_mode, but interpret
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nonstandard combinations as NTSC or PAL, depending on resolution.
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Thus the default tv_mode=NTSC effectively means "Auto".
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Tweak the advertised horizontal timings for 625/50 to match Rec.601
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Signed-off-by: Nick Hollinghurst <nick.hollinghurst@raspberrypi.com>
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---
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drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c | 134 ++++++++---------------
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drivers/gpu/drm/rp1/rp1-vec/rp1_vec.h | 24 ++--
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drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c | 15 +--
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3 files changed, 63 insertions(+), 110 deletions(-)
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--- a/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c
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+++ b/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.c
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@@ -48,52 +48,6 @@
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#include "rp1_vec.h"
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-/*
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- * Default TV standard parameter; it may be overridden by the OF
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- * property "tv_norm" (which should be one of the strings below).
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- *
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- * The default (empty string) supports various 60Hz and 50Hz modes,
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- * and will automatically select NTSC[-M] or PAL[-BDGHIKL]; the two
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- * "fake" 60Hz standards NTSC-443 and PAL60 also support 50Hz PAL.
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- * Other values will restrict the set of video modes offered.
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- *
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- * Finally, the DRM connector property "mode" (which is an integer)
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- * can be used to override this value, but it does not prevent the
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- * selection of an inapplicable video mode.
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- */
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-
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-static char *rp1vec_tv_norm_str;
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-module_param_named(tv_norm, rp1vec_tv_norm_str, charp, 0600);
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-MODULE_PARM_DESC(tv_norm, "Default TV norm.\n"
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- "\t\tSupported: NTSC, NTSC-J, NTSC-443, PAL, PAL-M, PAL-N,\n"
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- "\t\t\tPAL60.\n"
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- "\t\tDefault: empty string: infer PAL for a 50 Hz mode,\n"
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- "\t\t\tNTSC otherwise");
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-
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-const char * const rp1vec_tvstd_names[] = {
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- [RP1VEC_TVSTD_NTSC] = "NTSC",
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- [RP1VEC_TVSTD_NTSC_J] = "NTSC-J",
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- [RP1VEC_TVSTD_NTSC_443] = "NTSC-443",
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- [RP1VEC_TVSTD_PAL] = "PAL",
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- [RP1VEC_TVSTD_PAL_M] = "PAL-M",
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- [RP1VEC_TVSTD_PAL_N] = "PAL-N",
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- [RP1VEC_TVSTD_PAL60] = "PAL60",
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- [RP1VEC_TVSTD_DEFAULT] = "",
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-};
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-
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-static int rp1vec_parse_tv_norm(const char *str)
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-{
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- int i;
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-
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- if (str && *str) {
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- for (i = 0; i < ARRAY_SIZE(rp1vec_tvstd_names); ++i) {
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- if (strcasecmp(str, rp1vec_tvstd_names[i]) == 0)
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- return i;
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- }
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- }
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- return RP1VEC_TVSTD_DEFAULT;
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-}
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-
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static void rp1vec_pipe_update(struct drm_simple_display_pipe *pipe,
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struct drm_plane_state *old_state)
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{
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@@ -143,7 +97,7 @@ static void rp1vec_pipe_update(struct dr
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static void rp1vec_pipe_enable(struct drm_simple_display_pipe *pipe,
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struct drm_crtc_state *crtc_state,
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- struct drm_plane_state *plane_state)
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+ struct drm_plane_state *plane_state)
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{
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struct rp1_vec *vec = pipe->crtc.dev->dev_private;
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@@ -219,48 +173,64 @@ static const struct drm_display_mode rp1
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},
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{ /* Full size 625/50i with Rec.601 pixel rate */
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DRM_MODE("720x576i", DRM_MODE_TYPE_DRIVER, 13500,
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- 720, 720 + 20, 720 + 20 + 64, 864, 0,
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+ 720, 720 + 12, 720 + 12 + 64, 864, 0,
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576, 576 + 5, 576 + 5 + 5, 625, 0,
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DRM_MODE_FLAG_INTERLACE)
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},
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{ /* Cropped and squashed, for square(ish) pixels */
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DRM_MODE("704x512i", DRM_MODE_TYPE_DRIVER, 15429,
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- 704, 704 + 80, 704 + 80 + 72, 987, 0,
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+ 704, 704 + 72, 704 + 72 + 72, 987, 0,
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512, 512 + 37, 512 + 37 + 5, 625, 0,
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DRM_MODE_FLAG_INTERLACE)
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}
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};
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+/*
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+ * Advertise standard and preferred video modes.
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+ *
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+ * From each interlaced mode in the table above, derive a progressive one.
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+ *
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+ * This driver always supports all 50Hz and 60Hz video modes, regardless
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+ * of connector's tv_mode; nonstandard combinations generally default
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+ * to PAL[-BDGHIKL] or NTSC[-M] depending on resolution and field-rate
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+ * (except that "PAL" with 525/60 will be implemented as "PAL60").
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+ * However, the preferred mode will depend on the default TV mode.
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+ */
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+
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static int rp1vec_connector_get_modes(struct drm_connector *connector)
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{
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- struct rp1_vec *vec = container_of(connector, struct rp1_vec, connector);
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- bool ok525 = RP1VEC_TVSTD_SUPPORT_525(vec->tv_norm);
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- bool ok625 = RP1VEC_TVSTD_SUPPORT_625(vec->tv_norm);
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+ u64 val;
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int i, prog, n = 0;
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+ bool prefer625 = false;
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+
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+ if (!drm_object_property_get_default_value(&connector->base,
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+ connector->dev->mode_config.tv_mode_property,
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+ &val))
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+ prefer625 = (val == DRM_MODE_TV_MODE_PAL ||
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+ val == DRM_MODE_TV_MODE_PAL_N ||
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+ val == DRM_MODE_TV_MODE_SECAM);
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for (i = 0; i < ARRAY_SIZE(rp1vec_modes); i++) {
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- if ((rp1vec_modes[i].vtotal == 625) ? ok625 : ok525) {
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- for (prog = 0; prog < 2; prog++) {
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- struct drm_display_mode *mode =
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- drm_mode_duplicate(connector->dev,
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- &rp1vec_modes[i]);
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-
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- if (prog) {
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- mode->flags &= ~DRM_MODE_FLAG_INTERLACE;
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- mode->vdisplay >>= 1;
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- mode->vsync_start >>= 1;
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- mode->vsync_end >>= 1;
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- mode->vtotal >>= 1;
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- }
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-
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- if (mode->hdisplay == 704 &&
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- mode->vtotal == ((ok525) ? 525 : 625))
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- mode->type |= DRM_MODE_TYPE_PREFERRED;
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-
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- drm_mode_set_name(mode);
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- drm_mode_probed_add(connector, mode);
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- n++;
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+ for (prog = 0; prog < 2; prog++) {
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+ struct drm_display_mode *mode =
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+ drm_mode_duplicate(connector->dev,
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+ &rp1vec_modes[i]);
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+
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+ if (prog) {
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+ mode->flags &= ~DRM_MODE_FLAG_INTERLACE;
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+ mode->vdisplay >>= 1;
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+ mode->vsync_start >>= 1;
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+ mode->vsync_end >>= 1;
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+ mode->vtotal >>= 1;
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}
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+
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+ if (mode->hdisplay == 704 &&
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+ mode->vtotal == (prefer625 ? 625 : 525))
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+ mode->type |= DRM_MODE_TYPE_PREFERRED;
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+
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+ drm_mode_set_name(mode);
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+ drm_mode_probed_add(connector, mode);
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+ n++;
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}
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}
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@@ -269,11 +239,8 @@ static int rp1vec_connector_get_modes(st
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static void rp1vec_connector_reset(struct drm_connector *connector)
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{
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- struct rp1_vec *vec = container_of(connector, struct rp1_vec, connector);
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-
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drm_atomic_helper_connector_reset(connector);
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- if (connector->state)
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- connector->state->tv.mode = vec->tv_norm;
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+ drm_atomic_helper_connector_tv_reset(connector);
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}
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static int rp1vec_connector_atomic_check(struct drm_connector *conn,
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@@ -396,7 +363,6 @@ static int rp1vec_platform_probe(struct
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struct device *dev = &pdev->dev;
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struct drm_device *drm;
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struct rp1_vec *vec;
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- const char *str;
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int i, ret;
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dev_info(dev, __func__);
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@@ -419,10 +385,6 @@ static int rp1vec_platform_probe(struct
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drm->dev_private = vec;
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platform_set_drvdata(pdev, drm);
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- str = rp1vec_tv_norm_str;
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- of_property_read_string(dev->of_node, "tv_norm", &str);
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- vec->tv_norm = rp1vec_parse_tv_norm(str);
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-
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for (i = 0; i < RP1VEC_NUM_HW_BLOCKS; i++) {
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vec->hw_base[i] =
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devm_ioremap_resource(dev,
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@@ -463,9 +425,7 @@ static int rp1vec_platform_probe(struct
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drm->mode_config.funcs = &rp1vec_mode_funcs;
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drm_vblank_init(drm, 1);
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- ret = drm_mode_create_tv_properties_legacy(drm,
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- ARRAY_SIZE(rp1vec_tvstd_names),
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- rp1vec_tvstd_names);
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+ ret = drm_mode_create_tv_properties(drm, RP1VEC_SUPPORTED_TV_MODES);
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if (ret)
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goto err_free_drm;
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@@ -479,7 +439,9 @@ static int rp1vec_platform_probe(struct
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drm_object_attach_property(&vec->connector.base,
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drm->mode_config.tv_mode_property,
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- vec->tv_norm);
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+ (vec->connector.cmdline_mode.tv_mode_specified) ?
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+ vec->connector.cmdline_mode.tv_mode :
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+ DRM_MODE_TV_MODE_NTSC);
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ret = drm_simple_display_pipe_init(drm,
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&vec->pipe,
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--- a/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.h
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+++ b/drivers/gpu/drm/rp1/rp1-vec/rp1_vec.h
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@@ -20,20 +20,13 @@
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#define RP1VEC_HW_BLOCK_CFG 1
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#define RP1VEC_NUM_HW_BLOCKS 2
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-enum {
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- RP1VEC_TVSTD_NTSC = 0, /* +525 => NTSC 625 => PAL */
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- RP1VEC_TVSTD_NTSC_J, /* +525 => NTSC-J 625 => PAL */
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- RP1VEC_TVSTD_NTSC_443, /* +525 => NTSC-443 +625 => PAL */
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- RP1VEC_TVSTD_PAL, /* 525 => NTSC +625 => PAL */
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- RP1VEC_TVSTD_PAL_M, /* +525 => PAL-M 625 => PAL */
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- RP1VEC_TVSTD_PAL_N, /* 525 => NTSC +625 => PAL-N */
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- RP1VEC_TVSTD_PAL60, /* +525 => PAL60 +625 => PAL */
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- RP1VEC_TVSTD_DEFAULT, /* +525 => NTSC +625 => PAL */
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-};
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-
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-/* Which standards support which modes? Those marked with + above */
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-#define RP1VEC_TVSTD_SUPPORT_525(n) ((0xD7 >> (n)) & 1)
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-#define RP1VEC_TVSTD_SUPPORT_625(n) ((0xEC >> (n)) & 1)
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+#define RP1VEC_SUPPORTED_TV_MODES \
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+ (BIT(DRM_MODE_TV_MODE_NTSC) | \
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+ BIT(DRM_MODE_TV_MODE_NTSC_443) | \
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+ BIT(DRM_MODE_TV_MODE_NTSC_J) | \
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+ BIT(DRM_MODE_TV_MODE_PAL) | \
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+ BIT(DRM_MODE_TV_MODE_PAL_M) | \
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+ BIT(DRM_MODE_TV_MODE_PAL_N))
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/* ---------------------------------------------------------------------- */
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@@ -52,13 +45,10 @@ struct rp1_vec {
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/* Block (VCC, CFG) base addresses, and current state */
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void __iomem *hw_base[RP1VEC_NUM_HW_BLOCKS];
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u32 cur_fmt;
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- int tv_norm;
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bool vec_running, pipe_enabled;
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struct completion finished;
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};
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-extern const char * const rp1vec_tvstd_names[];
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-
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/* ---------------------------------------------------------------------- */
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/* Functions to control the VEC/DMA block */
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--- a/drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c
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+++ b/drivers/gpu/drm/rp1/rp1-vec/rp1_vec_hw.c
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@@ -337,16 +337,17 @@ void rp1vec_hw_setup(struct rp1_vec *vec
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mode_ilaced = !!(mode->flags & DRM_MODE_FLAG_INTERLACE);
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if (mode->vtotal >= 272 * (1 + mode_ilaced))
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mode_family = 1;
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+ else if (tvstd == DRM_MODE_TV_MODE_PAL_M || tvstd == DRM_MODE_TV_MODE_PAL)
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+ mode_family = 2;
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else
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- mode_family = (tvstd == RP1VEC_TVSTD_PAL_M || tvstd == RP1VEC_TVSTD_PAL60) ? 2 : 0;
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+ mode_family = 0;
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mode_narrow = (mode->clock >= 14336);
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hwm = &rp1vec_hwmodes[mode_family][mode_ilaced][mode_narrow];
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dev_info(&vec->pdev->dev,
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- "%s: in_fmt=\'%c%c%c%c\' mode=%dx%d%s [%d%d%d] tvstd=%d (%s)",
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+ "%s: in_fmt=\'%c%c%c%c\' mode=%dx%d%s [%d%d%d] tvstd=%d",
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__func__, in_format, in_format >> 8, in_format >> 16, in_format >> 24,
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mode->hdisplay, mode->vdisplay, (mode_ilaced) ? "i" : "",
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- mode_family, mode_ilaced, mode_narrow,
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- tvstd, rp1vec_tvstd_names[tvstd]);
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+ mode_family, mode_ilaced, mode_narrow, tvstd);
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w = mode->hdisplay;
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h = mode->vdisplay >> mode_ilaced;
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@@ -405,7 +406,7 @@ void rp1vec_hw_setup(struct rp1_vec *vec
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}
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/* Apply modifications */
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- if (tvstd == RP1VEC_TVSTD_NTSC_J && mode_family == 0) {
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+ if (tvstd == DRM_MODE_TV_MODE_NTSC_J && mode_family == 0) {
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/* Reduce pedestal (not quite to zero, for FIR overshoot); increase gain */
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VEC_WRITE(VEC_DAC_BC,
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BITS(VEC_DAC_BC_S11_PEDESTAL, 10) |
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@@ -414,14 +415,14 @@ void rp1vec_hw_setup(struct rp1_vec *vec
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BITS(VEC_DAC_C8_U16_SCALE_LUMA, 0x9400) |
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(hwm->back_end_regs[(0xC8 - 0x80) / 4] &
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~VEC_DAC_C8_U16_SCALE_LUMA_BITS));
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- } else if ((tvstd == RP1VEC_TVSTD_NTSC_443 || tvstd == RP1VEC_TVSTD_PAL60) &&
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+ } else if ((tvstd == DRM_MODE_TV_MODE_NTSC_443 || tvstd == DRM_MODE_TV_MODE_PAL) &&
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mode_family != 1) {
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/* Change colour carrier frequency to 4433618.75 Hz; disable hard sync */
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VEC_WRITE(VEC_DAC_D4, 0xcc48c1d1);
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VEC_WRITE(VEC_DAC_D8, 0x0a8262b2);
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VEC_WRITE(VEC_DAC_EC,
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hwm->back_end_regs[(0xEC - 0x80) / 4] & ~VEC_DAC_EC_SEQ_EN_BITS);
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- } else if (tvstd == RP1VEC_TVSTD_PAL_N && mode_family == 1) {
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+ } else if (tvstd == DRM_MODE_TV_MODE_PAL_N && mode_family == 1) {
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/* Change colour carrier frequency to 3582056.25 Hz */
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VEC_WRITE(VEC_DAC_D4, 0x9ce075f7);
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VEC_WRITE(VEC_DAC_D8, 0x087da511);
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