openwrt/target/linux/ramips/dts/mt7620a_tplink_archer.dtsi
Michael Pratt a14c2d409c ramips: mt7620: simplify DTS properties for GMAC
There are only 2 options in the driver
for the function of mt7620 internal switch port 4:

  EPHY mode (RJ-45, internal PHY)
  GMAC mode (RGMII, external PHY)

Let the DTS property be boolean instead of string
where EPHY mode is the default.

Fix how the properties are written
for all DTS that use them,
and add missing nodes where applicable,
and remove useless nodes,
and minor DTS formatting.

Signed-off-by: Michael Pratt <mcpratt@pm.me>
(cherry picked from commit 953bfe2eb3)
2022-04-19 14:48:21 +02:00

123 lines
1.7 KiB
Plaintext

#include "mt7620a.dtsi"
#include <dt-bindings/input/input.h>
#include <dt-bindings/gpio/gpio.h>
/ {
chosen {
bootargs = "console=ttyS0,115200";
};
keys {
compatible = "gpio-keys";
reset {
label = "reset";
gpios = <&gpio0 13 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RESTART>;
};
rfkill {
label = "rfkill";
gpios = <&gpio0 2 GPIO_ACTIVE_LOW>;
linux,code = <KEY_RFKILL>;
};
};
};
&gpio1 {
status = "okay";
};
&gpio2 {
status = "okay";
};
&gpio3 {
status = "okay";
};
&spi0 {
status = "okay";
flash@0 {
compatible = "jedec,spi-nor";
reg = <0>;
spi-max-frequency = <30000000>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x0 0x20000>;
read-only;
};
partition@20000 {
compatible = "tplink,firmware";
label = "firmware";
reg = <0x20000 0x7a0000>;
};
partition@7c0000 {
label = "config";
reg = <0x7c0000 0x10000>;
read-only;
};
rom: partition@7d0000 {
label = "rom";
reg = <0x7d0000 0x10000>;
read-only;
};
partition@7e0000 {
label = "romfile";
reg = <0x7e0000 0x10000>;
read-only;
};
radio: partition@7f0000 {
label = "radio";
reg = <0x7f0000 0x10000>;
read-only;
};
};
};
};
&ethernet {
pinctrl-names = "default";
mtd-mac-address = <&rom 0xf100>;
mediatek,portmap = "wllll";
};
&ehci {
status = "okay";
};
&ohci {
status = "okay";
};
&wmac {
ralink,mtd-eeprom = <&radio 0x0>;
};
&pcie {
status = "okay";
};
&pcie0 {
wifi: mt76@0,0 {
reg = <0x0000 0 0 0 0>;
mediatek,mtd-eeprom = <&radio 0x8000>;
ieee80211-freq-limit = <5000000 6000000>;
};
};