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14940aee45
Removed upstreamed: target/linux/mvebu/patches-5.4/001-PCI-aardvark-Wait-for-endpoint-to-be-ready-before-tr.patch target/linux/mvebu/patches-5.4/016-PCI-aardvark-Train-link-immediately-after-enabling-t.patch target/linux/mvebu/patches-5.4/017-PCI-aardvark-Improve-link-training.patch target/linux/mvebu/patches-5.4/018-PCI-aardvark-Issue-PERST-via-GPIO.patch target/linux/mvebu/patches-5.4/020-arm64-dts-marvell-armada-37xx-Set-pcie_reset_pin-to-.patch The following patch does not apply to upstream any more and needs some more work to make it work fully again. I am not sure if we are still able to set the UART to a none standard baud rate. target/linux/ath79/patches-5.4/921-serial-core-add-support-for-boot-console-with-arbitr.patch These patches needed manually changes: target/linux/generic/pending-5.4/110-ehci_hcd_ignore_oc.patch target/linux/ipq806x/patches-5.4/0065-arm-override-compiler-flags.patch target/linux/layerscape/patches-5.4/804-crypto-0016-MLKU-114-1-crypto-caam-reduce-page-0-regs-access-to-.patch target/linux/mvebu/patches-5.4/019-PCI-aardvark-Add-PHY-support.patch target/linux/octeontx/patches-5.4/0004-PCI-add-quirk-for-Gateworks-PLX-PEX860x-switch-with-.patch All others updated automatically. Compile-tested on: malta/le, armvirt/64, lantiq/xrx200 Runtime-tested on: malta/le, armvirt/64, lantiq/xrx200 Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
67 lines
2.1 KiB
Diff
67 lines
2.1 KiB
Diff
From 6ac09efa8f0e189ffe7dd7b0889289de56ee44cc Mon Sep 17 00:00:00 2001
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From: Jonas Gorski <jogo@openwrt.org>
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Date: Sun, 19 Jan 2014 12:18:03 +0100
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Subject: [PATCH] USB: EHCI: allow limiting ports for ehci-platform
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In the same way as the ohci platform driver allows limiting ports,
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enable the same for ehci. This prevents a mismatch in the available
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ports between ehci/ohci on USB 2.0 controllers.
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This is needed if the USB host controller always reports the maximum
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number of ports regardless of the number of available ports (because
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one might be set to be usb device).
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Signed-off-by: Jonas Gorski <jogo@openwrt.org>
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---
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drivers/usb/host/ehci-hcd.c | 4 ++++
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drivers/usb/host/ehci-platform.c | 2 ++
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drivers/usb/host/ehci.h | 1 +
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include/linux/usb/ehci_pdriver.h | 1 +
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4 files changed, 8 insertions(+)
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--- a/drivers/usb/host/ehci-hcd.c
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+++ b/drivers/usb/host/ehci-hcd.c
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@@ -687,6 +687,10 @@ int ehci_setup(struct usb_hcd *hcd)
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/* cache this readonly data; minimize chip reads */
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ehci->hcs_params = ehci_readl(ehci, &ehci->caps->hcs_params);
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+ if (ehci->num_ports) {
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+ ehci->hcs_params &= ~0xf; /* bits 3:0, ports on HC */
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+ ehci->hcs_params |= ehci->num_ports;
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+ }
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ehci->sbrn = HCD_USB2;
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--- a/drivers/usb/host/ehci-platform.c
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+++ b/drivers/usb/host/ehci-platform.c
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@@ -62,6 +62,9 @@ static int ehci_platform_reset(struct us
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ehci->has_synopsys_hc_bug = pdata->has_synopsys_hc_bug;
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+ if (pdata->num_ports && pdata->num_ports <= 15)
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+ ehci->num_ports = pdata->num_ports;
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+
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if (pdata->pre_setup) {
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retval = pdata->pre_setup(hcd);
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if (retval < 0)
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--- a/drivers/usb/host/ehci.h
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+++ b/drivers/usb/host/ehci.h
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@@ -203,6 +203,7 @@ struct ehci_hcd { /* one per controlle
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u32 command;
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/* SILICON QUIRKS */
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+ unsigned int num_ports;
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unsigned no_selective_suspend:1;
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unsigned has_fsl_port_bug:1; /* FreeScale */
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unsigned has_fsl_hs_errata:1; /* Freescale HS quirk */
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--- a/include/linux/usb/ehci_pdriver.h
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+++ b/include/linux/usb/ehci_pdriver.h
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@@ -43,6 +43,7 @@ struct usb_hcd;
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*/
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struct usb_ehci_pdata {
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int caps_offset;
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+ unsigned int num_ports;
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unsigned has_tt:1;
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unsigned has_synopsys_hc_bug:1;
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unsigned big_endian_desc:1;
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