mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-27 09:12:39 +00:00
894f483d20
Removed upstreamed:
bcm53xx/patches-5.10/033-v5.16-0014-ARM-dts-NSP-Fix-mpcore-mmc-node-names.patch
Manually rebased:
ipq806x/patches-5.10/086-ipq8064-fix-duplicate-node.patch
All other patches automatically rebased.
Build system: x86_64
Build-tested: bcm2711/RPi4B, ipq806x/R7800
Run-tested: bcm2711/RPi4B, ipq806x/R7800
Signed-off-by: John Audia <graysky@archlinux.us>
106 lines
4.7 KiB
Diff
106 lines
4.7 KiB
Diff
From cad8f63047c0691e8185d3c9c6a2705b83310c9c Mon Sep 17 00:00:00 2001
|
|
From: Jonas Gorski <jonas.gorski@gmail.com>
|
|
Date: Mon, 31 Jul 2017 20:10:36 +0200
|
|
Subject: [PATCH] MIPS: BCM63XX: add clkdev lookups for device tree
|
|
|
|
---
|
|
arch/mips/bcm63xx/clk.c | 15 +++++++++++++++
|
|
1 file changed, 15 insertions(+)
|
|
|
|
--- a/arch/mips/bcm63xx/clk.c
|
|
+++ b/arch/mips/bcm63xx/clk.c
|
|
@@ -495,6 +495,8 @@ static struct clk_lookup bcm3368_clks[]
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("fff8c100.serial", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("fff8c120.serial", "refclk", &clk_periph),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
|
|
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
|
|
@@ -511,7 +513,9 @@ static struct clk_lookup bcm6318_clks[]
|
|
/* fixed rate clocks */
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
|
|
+ CLKDEV_INIT("10003000.spi", "pll", &clk_hsspi_pll),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
|
|
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
|
|
@@ -525,7 +529,10 @@ static struct clk_lookup bcm6328_clks[]
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
|
|
+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
|
|
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
|
|
@@ -538,6 +545,7 @@ static struct clk_lookup bcm6338_clks[]
|
|
/* fixed rate clocks */
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
|
|
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
|
|
@@ -552,6 +560,7 @@ static struct clk_lookup bcm6345_clks[]
|
|
/* fixed rate clocks */
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
|
|
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
|
|
@@ -566,6 +575,7 @@ static struct clk_lookup bcm6348_clks[]
|
|
/* fixed rate clocks */
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("fffe0300.serial", "refclk", &clk_periph),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
|
|
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
|
|
@@ -582,6 +592,8 @@ static struct clk_lookup bcm6358_clks[]
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("fffe0100.serial", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("fffe0120.serial", "refclk", &clk_periph),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enet0", &clk_enet0),
|
|
CLKDEV_INIT(NULL, "enet1", &clk_enet1),
|
|
@@ -601,7 +613,10 @@ static struct clk_lookup bcm6362_clks[]
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
|
|
+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
|
|
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
|
|
@@ -617,6 +632,8 @@ static struct clk_lookup bcm6368_clks[]
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("10000100.serial", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("10000120.serial", "refclk", &clk_periph),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
|
|
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
|
|
@@ -631,7 +648,10 @@ static struct clk_lookup bcm63268_clks[]
|
|
CLKDEV_INIT(NULL, "periph", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.0", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx_uart.1", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("10000180.serial", "refclk", &clk_periph),
|
|
+ CLKDEV_INIT("100001a0.serial", "refclk", &clk_periph),
|
|
CLKDEV_INIT("bcm63xx-hsspi.0", "pll", &clk_hsspi_pll),
|
|
+ CLKDEV_INIT("10001000.spi", "pll", &clk_hsspi_pll),
|
|
/* gated clocks */
|
|
CLKDEV_INIT(NULL, "enetsw", &clk_enetsw),
|
|
CLKDEV_INIT(NULL, "usbh", &clk_usbh),
|