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2f7fb57c12
* Merge uboot-ramips into uboot-mediatek. * Port support for the RAVPower RP WD009 to U-Boot 2022.07. * Add support for MT7621 and add builds for the reference boards. * Add builds for MT7620 and MT7628 reference boards. This should help to make development of U-Boot-level board support for all MediaTek targets much easier. Signed-off-by: Daniel Golle <daniel@makrotopia.org>
341 lines
9.1 KiB
Diff
341 lines
9.1 KiB
Diff
From 18dd1ef9417d0880f2f492b55bd4d9ede499f137 Mon Sep 17 00:00:00 2001
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From: Weijie Gao <weijie.gao@mediatek.com>
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Date: Fri, 20 May 2022 11:24:10 +0800
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Subject: [PATCH 24/25] tools: mtk_image: add support for MT7621 NAND images
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The BootROM of MT7621 requires a image header for SPL to record its size
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and load address when booting from NAND.
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To create such an image, one can use the following command line:
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mkimage -T mtk_image -a 0x80200000 -e 0x80200000 -n "mt7621=1"
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-d u-boot-spl-ddr.bin u-boot-spl-ddr.img
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Reviewed-by: Daniel Schwierzeck <daniel.schwierzeck@gmail.com>
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Signed-off-by: Weijie Gao <weijie.gao@mediatek.com>
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---
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tools/mtk_image.c | 182 ++++++++++++++++++++++++++++++++++++++++++++++
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tools/mtk_image.h | 24 ++++++
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2 files changed, 206 insertions(+)
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diff --git a/tools/mtk_image.c b/tools/mtk_image.c
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index 418c5fd54b..de5ce4d964 100644
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--- a/tools/mtk_image.c
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+++ b/tools/mtk_image.c
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@@ -6,7 +6,9 @@
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* Author: Weijie Gao <weijie.gao@mediatek.com>
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*/
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+#include <time.h>
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#include <image.h>
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+#include <u-boot/crc.h>
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#include <u-boot/sha256.h>
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#include "imagetool.h"
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#include "mtk_image.h"
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@@ -251,17 +253,45 @@ static uint32_t img_size;
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static enum brlyt_img_type hdr_media;
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static uint32_t hdr_offset;
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static int use_lk_hdr;
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+static int use_mt7621_hdr;
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static bool is_arm64_image;
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/* LK image name */
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static char lk_name[32] = "U-Boot";
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+/* CRC32 normal table required by MT7621 image */
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+static uint32_t crc32tbl[256];
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+
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/* NAND header selected by user */
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static const union nand_boot_header *hdr_nand;
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/* GFH header + 2 * 4KB pages of NAND */
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static char hdr_tmp[sizeof(struct gfh_header) + 0x2000];
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+static uint32_t crc32_normal_cal(uint32_t crc, const void *data, size_t length,
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+ const uint32_t *crc32c_table)
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+{
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+ const uint8_t *p = data;
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+
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+ while (length--)
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+ crc = crc32c_table[(uint8_t)((crc >> 24) ^ *p++)] ^ (crc << 8);
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+
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+ return crc;
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+}
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+
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+static void crc32_normal_init(uint32_t *crc32c_table, uint32_t poly)
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+{
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+ uint32_t v, i, j;
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+
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+ for (i = 0; i < 256; i++) {
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+ v = i << 24;
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+ for (j = 0; j < 8; j++)
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+ v = (v << 1) ^ ((v & (1 << 31)) ? poly : 0);
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+
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+ crc32c_table[i] = v;
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+ }
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+}
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+
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static int mtk_image_check_image_types(uint8_t type)
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{
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if (type == IH_TYPE_MTKIMAGE)
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@@ -283,6 +313,7 @@ static int mtk_brom_parse_imagename(const char *imagename)
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static const char *hdr_offs = "";
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static const char *nandinfo = "";
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static const char *lk = "";
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+ static const char *mt7621 = "";
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static const char *arm64_param = "";
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key = buf;
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@@ -332,6 +363,9 @@ static int mtk_brom_parse_imagename(const char *imagename)
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if (!strcmp(key, "lk"))
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lk = val;
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+ if (!strcmp(key, "mt7621"))
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+ mt7621 = val;
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+
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if (!strcmp(key, "lkname"))
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snprintf(lk_name, sizeof(lk_name), "%s", val);
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@@ -352,6 +386,13 @@ static int mtk_brom_parse_imagename(const char *imagename)
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return 0;
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}
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+ /* if user specified MT7621 image header, skip following checks */
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+ if (mt7621 && mt7621[0] == '1') {
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+ use_mt7621_hdr = 1;
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+ free(buf);
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+ return 0;
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+ }
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+
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/* parse media type */
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for (i = 0; i < ARRAY_SIZE(brom_images); i++) {
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if (!strcmp(brom_images[i].name, media)) {
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@@ -419,6 +460,13 @@ static int mtk_image_vrec_header(struct image_tool_params *params,
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return 0;
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}
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+ if (use_mt7621_hdr) {
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+ tparams->header_size = image_get_header_size();
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+ tparams->hdr = &hdr_tmp;
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+ memset(&hdr_tmp, 0, tparams->header_size);
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+ return 0;
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+ }
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+
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if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
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tparams->header_size = 2 * le16_to_cpu(hdr_nand->pagesize);
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else
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@@ -579,9 +627,90 @@ static int mtk_image_verify_nand_header(const uint8_t *ptr, int print)
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return 0;
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}
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+static uint32_t crc32be_cal(const void *data, size_t length)
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+{
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+ uint32_t crc = 0;
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+ uint8_t c;
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+
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+ if (crc32tbl[1] != MT7621_IH_CRC_POLYNOMIAL)
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+ crc32_normal_init(crc32tbl, MT7621_IH_CRC_POLYNOMIAL);
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+
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+ crc = crc32_normal_cal(crc, data, length, crc32tbl);
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+
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+ for (; length; length >>= 8) {
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+ c = length & 0xff;
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+ crc = crc32_normal_cal(crc, &c, 1, crc32tbl);
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+ }
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+
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+ return ~crc;
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+}
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+
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+static int mtk_image_verify_mt7621_header(const uint8_t *ptr, int print)
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+{
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+ const image_header_t *hdr = (const image_header_t *)ptr;
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+ struct mt7621_nand_header *nhdr;
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+ uint32_t spl_size, crcval;
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+ image_header_t header;
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+ int ret;
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+
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+ spl_size = image_get_size(hdr);
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+
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+ if (spl_size > img_size) {
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+ if (print)
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+ printf("Incomplete SPL image\n");
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+ return -1;
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+ }
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+
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+ ret = image_check_hcrc(hdr);
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+ if (!ret) {
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+ if (print)
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+ printf("Bad header CRC\n");
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+ return -1;
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+ }
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+
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+ ret = image_check_dcrc(hdr);
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+ if (!ret) {
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+ if (print)
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+ printf("Bad data CRC\n");
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+ return -1;
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+ }
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+
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+ /* Copy header so we can blank CRC field for re-calculation */
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+ memmove(&header, hdr, image_get_header_size());
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+ image_set_hcrc(&header, 0);
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+
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+ nhdr = (struct mt7621_nand_header *)header.ih_name;
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+ crcval = be32_to_cpu(nhdr->crc);
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+ nhdr->crc = 0;
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+
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+ if (crcval != crc32be_cal(&header, image_get_header_size())) {
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+ if (print)
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+ printf("Bad NAND header CRC\n");
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+ return -1;
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+ }
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+
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+ if (print) {
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+ printf("Load Address: %08x\n", image_get_load(hdr));
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+
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+ printf("Image Name: %.*s\n", MT7621_IH_NMLEN,
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+ image_get_name(hdr));
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+
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+ if (IMAGE_ENABLE_TIMESTAMP) {
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+ printf("Created: ");
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+ genimg_print_time((time_t)image_get_time(hdr));
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+ }
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+
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+ printf("Data Size: ");
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+ genimg_print_size(image_get_data_size(hdr));
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+ }
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+
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+ return 0;
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+}
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+
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static int mtk_image_verify_header(unsigned char *ptr, int image_size,
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struct image_tool_params *params)
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{
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+ image_header_t *hdr = (image_header_t *)ptr;
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union lk_hdr *lk = (union lk_hdr *)ptr;
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/* nothing to verify for LK image header */
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@@ -590,6 +719,9 @@ static int mtk_image_verify_header(unsigned char *ptr, int image_size,
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img_size = image_size;
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+ if (image_get_magic(hdr) == IH_MAGIC)
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+ return mtk_image_verify_mt7621_header(ptr, 0);
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+
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if (!strcmp((char *)ptr, NAND_BOOT_NAME))
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return mtk_image_verify_nand_header(ptr, 0);
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else
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@@ -600,6 +732,7 @@ static int mtk_image_verify_header(unsigned char *ptr, int image_size,
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static void mtk_image_print_header(const void *ptr)
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{
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+ image_header_t *hdr = (image_header_t *)ptr;
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union lk_hdr *lk = (union lk_hdr *)ptr;
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if (le32_to_cpu(lk->magic) == LK_PART_MAGIC) {
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@@ -610,6 +743,11 @@ static void mtk_image_print_header(const void *ptr)
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printf("Image Type: MediaTek BootROM Loadable Image\n");
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+ if (image_get_magic(hdr) == IH_MAGIC) {
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+ mtk_image_verify_mt7621_header(ptr, 1);
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+ return;
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+ }
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+
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if (!strcmp((char *)ptr, NAND_BOOT_NAME))
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mtk_image_verify_nand_header(ptr, 1);
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else
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@@ -773,6 +911,45 @@ static void mtk_image_set_nand_header(void *ptr, off_t filesize,
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filesize - 2 * le16_to_cpu(hdr_nand->pagesize) - SHA256_SUM_LEN);
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}
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+static void mtk_image_set_mt7621_header(void *ptr, off_t filesize,
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+ uint32_t loadaddr)
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+{
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+ image_header_t *hdr = (image_header_t *)ptr;
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+ struct mt7621_stage1_header *shdr;
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+ struct mt7621_nand_header *nhdr;
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+ uint32_t datasize, crcval;
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+
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+ datasize = filesize - image_get_header_size();
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+ nhdr = (struct mt7621_nand_header *)hdr->ih_name;
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+ shdr = (struct mt7621_stage1_header *)(ptr + image_get_header_size());
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+
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+ shdr->ep = cpu_to_be32(loadaddr);
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+ shdr->stage_size = cpu_to_be32(datasize);
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+
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+ image_set_magic(hdr, IH_MAGIC);
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+ image_set_time(hdr, time(NULL));
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+ image_set_size(hdr, datasize);
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+ image_set_load(hdr, loadaddr);
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+ image_set_ep(hdr, loadaddr);
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+ image_set_os(hdr, IH_OS_U_BOOT);
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+ image_set_arch(hdr, IH_ARCH_MIPS);
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+ image_set_type(hdr, IH_TYPE_STANDALONE);
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+ image_set_comp(hdr, IH_COMP_NONE);
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+
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+ crcval = crc32(0, (uint8_t *)shdr, datasize);
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+ image_set_dcrc(hdr, crcval);
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+
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+ strncpy(nhdr->ih_name, "MT7621 NAND", MT7621_IH_NMLEN);
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+
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+ nhdr->ih_stage_offset = cpu_to_be32(image_get_header_size());
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+
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+ crcval = crc32be_cal(hdr, image_get_header_size());
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+ nhdr->crc = cpu_to_be32(crcval);
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+
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+ crcval = crc32(0, (uint8_t *)hdr, image_get_header_size());
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+ image_set_hcrc(hdr, crcval);
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+}
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+
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static void mtk_image_set_header(void *ptr, struct stat *sbuf, int ifd,
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struct image_tool_params *params)
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{
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@@ -791,6 +968,11 @@ static void mtk_image_set_header(void *ptr, struct stat *sbuf, int ifd,
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img_gen = true;
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img_size = sbuf->st_size;
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+ if (use_mt7621_hdr) {
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+ mtk_image_set_mt7621_header(ptr, sbuf->st_size, params->addr);
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+ return;
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+ }
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+
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if (hdr_media == BRLYT_TYPE_NAND || hdr_media == BRLYT_TYPE_SNAND)
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mtk_image_set_nand_header(ptr, sbuf->st_size, params->addr);
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else
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diff --git a/tools/mtk_image.h b/tools/mtk_image.h
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index 7dda71ce88..d868545a33 100644
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--- a/tools/mtk_image.h
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+++ b/tools/mtk_image.h
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@@ -200,4 +200,28 @@ union lk_hdr {
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#define LK_PART_MAGIC 0x58881688
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+/* MT7621 NAND SPL image header */
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+
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+#define MT7621_IH_NMLEN 12
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+#define MT7621_IH_CRC_POLYNOMIAL 0x04c11db7
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+
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+struct mt7621_nand_header {
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+ char ih_name[MT7621_IH_NMLEN];
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+ uint32_t nand_ac_timing;
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+ uint32_t ih_stage_offset;
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+ uint32_t ih_bootloader_offset;
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+ uint32_t nand_info_1_data;
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+ uint32_t crc;
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+};
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+
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+struct mt7621_stage1_header {
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+ uint32_t jump_insn[2];
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+ uint32_t ep;
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+ uint32_t stage_size;
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+ uint32_t has_stage2;
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+ uint32_t next_ep;
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+ uint32_t next_size;
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+ uint32_t next_offset;
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+};
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+
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#endif /* _MTK_IMAGE_H */
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--
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2.36.1
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