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126 lines
4.0 KiB
Diff
126 lines
4.0 KiB
Diff
From 0cd5141d1866afb23286fe90cd846441fe7aeb39 Mon Sep 17 00:00:00 2001
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From: =?UTF-8?q?Pali=20Roh=C3=A1r?= <pali@kernel.org>
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Date: Sat, 27 Mar 2021 14:44:11 +0100
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Subject: [PATCH] PCI: aardvark: Rewrite IRQ code to chained IRQ handler
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MIME-Version: 1.0
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Content-Type: text/plain; charset=UTF-8
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Content-Transfer-Encoding: 8bit
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Rewrite the code to use irq_set_chained_handler_and_data() handler with
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chained_irq_enter() and chained_irq_exit() processing instead of using
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devm_request_irq().
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advk_pcie_irq_handler() reads IRQ status bits and calls other functions
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based on which bits are set. These functions then read its own IRQ status
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bits and calls other aardvark functions based on these bits. Finally
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generic_handle_domain_irq() with translated linux IRQ numbers are called.
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Signed-off-by: Pali Rohár <pali@kernel.org>
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Signed-off-by: Marek Behún <kabel@kernel.org>
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---
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drivers/pci/controller/pci-aardvark.c | 48 +++++++++++++++------------
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1 file changed, 26 insertions(+), 22 deletions(-)
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--- a/drivers/pci/controller/pci-aardvark.c
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+++ b/drivers/pci/controller/pci-aardvark.c
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@@ -275,6 +275,7 @@ struct advk_pcie {
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u32 actions;
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} wins[OB_WIN_COUNT];
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u8 wins_count;
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+ int irq;
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struct irq_domain *irq_domain;
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struct irq_chip irq_chip;
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raw_spinlock_t irq_lock;
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@@ -1440,21 +1441,26 @@ static void advk_pcie_handle_int(struct
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}
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}
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-static irqreturn_t advk_pcie_irq_handler(int irq, void *arg)
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+static void advk_pcie_irq_handler(struct irq_desc *desc)
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{
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- struct advk_pcie *pcie = arg;
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- u32 status;
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+ struct advk_pcie *pcie = irq_desc_get_handler_data(desc);
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+ struct irq_chip *chip = irq_desc_get_chip(desc);
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+ u32 val, mask, status;
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- status = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG);
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- if (!(status & PCIE_IRQ_CORE_INT))
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- return IRQ_NONE;
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+ chained_irq_enter(chip, desc);
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- advk_pcie_handle_int(pcie);
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+ val = advk_readl(pcie, HOST_CTRL_INT_STATUS_REG);
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+ mask = advk_readl(pcie, HOST_CTRL_INT_MASK_REG);
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+ status = val & ((~mask) & PCIE_IRQ_ALL_MASK);
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- /* Clear interrupt */
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- advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG);
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+ if (status & PCIE_IRQ_CORE_INT) {
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+ advk_pcie_handle_int(pcie);
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- return IRQ_HANDLED;
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+ /* Clear interrupt */
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+ advk_writel(pcie, PCIE_IRQ_CORE_INT, HOST_CTRL_INT_STATUS_REG);
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+ }
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+
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+ chained_irq_exit(chip, desc);
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}
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static void __maybe_unused advk_pcie_disable_phy(struct advk_pcie *pcie)
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@@ -1521,7 +1527,7 @@ static int advk_pcie_probe(struct platfo
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struct advk_pcie *pcie;
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struct pci_host_bridge *bridge;
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struct resource_entry *entry;
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- int ret, irq;
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+ int ret;
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bridge = devm_pci_alloc_host_bridge(dev, sizeof(struct advk_pcie));
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if (!bridge)
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@@ -1609,17 +1615,9 @@ static int advk_pcie_probe(struct platfo
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if (IS_ERR(pcie->base))
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return PTR_ERR(pcie->base);
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- irq = platform_get_irq(pdev, 0);
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- if (irq < 0)
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- return irq;
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-
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- ret = devm_request_irq(dev, irq, advk_pcie_irq_handler,
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- IRQF_SHARED | IRQF_NO_THREAD, "advk-pcie",
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- pcie);
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- if (ret) {
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- dev_err(dev, "Failed to register interrupt\n");
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- return ret;
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- }
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+ pcie->irq = platform_get_irq(pdev, 0);
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+ if (pcie->irq < 0)
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+ return pcie->irq;
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pcie->reset_gpio = devm_gpiod_get_from_of_node(dev, dev->of_node,
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"reset-gpios", 0,
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@@ -1668,11 +1666,14 @@ static int advk_pcie_probe(struct platfo
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return ret;
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}
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+ irq_set_chained_handler_and_data(pcie->irq, advk_pcie_irq_handler, pcie);
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+
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bridge->sysdata = pcie;
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bridge->ops = &advk_pcie_ops;
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ret = pci_host_probe(bridge);
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if (ret < 0) {
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+ irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);
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advk_pcie_remove_msi_irq_domain(pcie);
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advk_pcie_remove_irq_domain(pcie);
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return ret;
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@@ -1720,6 +1721,9 @@ static int advk_pcie_remove(struct platf
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advk_writel(pcie, PCIE_ISR1_ALL_MASK, PCIE_ISR1_REG);
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advk_writel(pcie, PCIE_IRQ_ALL_MASK, HOST_CTRL_INT_STATUS_REG);
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+ /* Remove IRQ handler */
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+ irq_set_chained_handler_and_data(pcie->irq, NULL, NULL);
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+
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/* Remove IRQ domains */
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advk_pcie_remove_msi_irq_domain(pcie);
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advk_pcie_remove_irq_domain(pcie);
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