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Qualcomm Atheros IPQ807x is a modern WiSoC featuring: * Quad Core ARMv8 Cortex A-53 * @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye * @ 1.4 GHz (IPQ8070A/1A) Codename Acorn * Dual Band simultaneaous IEEE 802.11ax * 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A) * 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A) * 5G: 2x2/80MHz (IPQ8070A) * 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A) * 2G: 2x2/40MHz (IPQ8070A/1A) * 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports) * 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye * 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn * DDR3L/4 32/16 bit up to 2400MT/s * SDIO 3.0/SD card 3.0/eMMC 5.1 * Dual USB 3.0 * One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane) * Parallel NAND (ONFI)/LCD * 6x QUP BLSP SPI/I2C/UART * I2S, PCM, and TDMA * HW PWM * 1.8V configurable GPIO * Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc) Note that only v2 SOC models aka the ones ending with A suffix are supported, v1 models do not comply to the final 802.11ax and have lower clocks, lack the Gen3 PCIe etc. SoC itself has two UBI32 cores for the NSS offloading system, however currently no offloading is supported. Signed-off-by: Robert Marko <robimarko@gmail.com>
43 lines
1.2 KiB
Diff
43 lines
1.2 KiB
Diff
From 82ceb86227b1fc15c76d5fc691b2bf425f1a63b3 Mon Sep 17 00:00:00 2001
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From: Robert Marko <robimarko@gmail.com>
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Date: Mon, 7 Nov 2022 10:29:30 +0100
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Subject: [PATCH] arm64: dts: qcom: hk01: use GPIO flags for tlmm
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Use respective GPIO_ACTIVE_LOW/HIGH flags for tlmm GPIOs instead of
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harcoding the cell value.
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Signed-off-by: Robert Marko <robimarko@gmail.com>
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Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
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Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
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Signed-off-by: Bjorn Andersson <andersson@kernel.org>
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Link: https://lore.kernel.org/r/20221107092930.33325-3-robimarko@gmail.com
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---
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arch/arm64/boot/dts/qcom/ipq8074-hk01.dts | 5 +++--
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1 file changed, 3 insertions(+), 2 deletions(-)
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--- a/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
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+++ b/arch/arm64/boot/dts/qcom/ipq8074-hk01.dts
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@@ -4,6 +4,7 @@
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*/
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#include "ipq8074.dtsi"
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#include "pmp8074.dtsi"
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+#include <dt-bindings/gpio/gpio.h>
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/ {
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model = "Qualcomm Technologies, Inc. IPQ8074-HK01";
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@@ -50,12 +51,12 @@
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&pcie0 {
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status = "okay";
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- perst-gpios = <&tlmm 61 0x1>;
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+ perst-gpios = <&tlmm 61 GPIO_ACTIVE_LOW>;
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};
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&pcie1 {
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status = "okay";
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- perst-gpios = <&tlmm 58 0x1>;
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+ perst-gpios = <&tlmm 58 GPIO_ACTIVE_LOW>;
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};
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&pcie_phy0 {
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