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Qualcomm Atheros IPQ807x is a modern WiSoC featuring: * Quad Core ARMv8 Cortex A-53 * @ 2.2 GHz (IPQ8072A/4A/6A/8A) Codename Hawkeye * @ 1.4 GHz (IPQ8070A/1A) Codename Acorn * Dual Band simultaneaous IEEE 802.11ax * 5G: 8x8/80 or 4x4/160MHz (IPQ8074A/8A) * 5G: 4x4/80 or 2x2/160MHz (IPQ8071A/2A/6A) * 5G: 2x2/80MHz (IPQ8070A) * 2G: 4x4/40MHz (IPQ8072A/4A/6A/8A) * 2G: 2x2/40MHz (IPQ8070A/1A) * 1x PSGMII via QCA8072/5 (Max 5x 1GbE ports) * 2x SGMII/USXGMII (1/2.5/5/10 GbE) on Hawkeye * 2x SGMII/USXGMII (1/2.5/5 GbE) on Acorn * DDR3L/4 32/16 bit up to 2400MT/s * SDIO 3.0/SD card 3.0/eMMC 5.1 * Dual USB 3.0 * One PCIe Gen2.1 and one PCIe Gen3.0 port (Single lane) * Parallel NAND (ONFI)/LCD * 6x QUP BLSP SPI/I2C/UART * I2S, PCM, and TDMA * HW PWM * 1.8V configurable GPIO * Companion PMP8074 PMIC via SPMI (GPIOS, RTC etc) Note that only v2 SOC models aka the ones ending with A suffix are supported, v1 models do not comply to the final 802.11ax and have lower clocks, lack the Gen3 PCIe etc. SoC itself has two UBI32 cores for the NSS offloading system, however currently no offloading is supported. Signed-off-by: Robert Marko <robimarko@gmail.com>
66 lines
2.9 KiB
Diff
66 lines
2.9 KiB
Diff
From 18921bfd81c88fb85a19683467f680897672f062 Mon Sep 17 00:00:00 2001
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From: Bjorn Andersson <bjorn.andersson@linaro.org>
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Date: Sun, 17 Oct 2021 09:12:18 -0700
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Subject: [PATCH] mfd: qcom-spmi-pmic: Add missing PMICs supported by socinfo
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The Qualcomm socinfo driver has eight more PMICs described, add these to
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the SPMI PMIC driver as well.
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Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
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Signed-off-by: Lee Jones <lee.jones@linaro.org>
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Link: https://lore.kernel.org/r/20211017161218.2378176-4-bjorn.andersson@linaro.org
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---
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drivers/mfd/qcom-spmi-pmic.c | 17 +++++++++++++++++
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1 file changed, 17 insertions(+)
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--- a/drivers/mfd/qcom-spmi-pmic.c
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+++ b/drivers/mfd/qcom-spmi-pmic.c
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@@ -31,6 +31,8 @@
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#define PM8916_SUBTYPE 0x0b
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#define PM8004_SUBTYPE 0x0c
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#define PM8909_SUBTYPE 0x0d
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+#define PM8028_SUBTYPE 0x0e
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+#define PM8901_SUBTYPE 0x0f
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#define PM8950_SUBTYPE 0x10
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#define PMI8950_SUBTYPE 0x11
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#define PM8998_SUBTYPE 0x14
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@@ -38,6 +40,13 @@
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#define PM8005_SUBTYPE 0x18
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#define PM660L_SUBTYPE 0x1A
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#define PM660_SUBTYPE 0x1B
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+#define PM8150_SUBTYPE 0x1E
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+#define PM8150L_SUBTYPE 0x1f
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+#define PM8150B_SUBTYPE 0x20
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+#define PMK8002_SUBTYPE 0x21
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+#define PM8009_SUBTYPE 0x24
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+#define PM8150C_SUBTYPE 0x26
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+#define SMB2351_SUBTYPE 0x29
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static const struct of_device_id pmic_spmi_id_table[] = {
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{ .compatible = "qcom,pm660", .data = (void *)PM660_SUBTYPE },
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@@ -45,9 +54,15 @@ static const struct of_device_id pmic_sp
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{ .compatible = "qcom,pm8004", .data = (void *)PM8004_SUBTYPE },
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{ .compatible = "qcom,pm8005", .data = (void *)PM8005_SUBTYPE },
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{ .compatible = "qcom,pm8019", .data = (void *)PM8019_SUBTYPE },
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+ { .compatible = "qcom,pm8028", .data = (void *)PM8028_SUBTYPE },
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{ .compatible = "qcom,pm8110", .data = (void *)PM8110_SUBTYPE },
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+ { .compatible = "qcom,pm8150", .data = (void *)PM8150_SUBTYPE },
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+ { .compatible = "qcom,pm8150b", .data = (void *)PM8150B_SUBTYPE },
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+ { .compatible = "qcom,pm8150c", .data = (void *)PM8150C_SUBTYPE },
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+ { .compatible = "qcom,pm8150l", .data = (void *)PM8150L_SUBTYPE },
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{ .compatible = "qcom,pm8226", .data = (void *)PM8226_SUBTYPE },
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{ .compatible = "qcom,pm8841", .data = (void *)PM8841_SUBTYPE },
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+ { .compatible = "qcom,pm8901", .data = (void *)PM8901_SUBTYPE },
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{ .compatible = "qcom,pm8909", .data = (void *)PM8909_SUBTYPE },
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{ .compatible = "qcom,pm8916", .data = (void *)PM8916_SUBTYPE },
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{ .compatible = "qcom,pm8941", .data = (void *)PM8941_SUBTYPE },
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@@ -60,6 +75,8 @@ static const struct of_device_id pmic_sp
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{ .compatible = "qcom,pmi8962", .data = (void *)PMI8962_SUBTYPE },
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{ .compatible = "qcom,pmi8994", .data = (void *)PMI8994_SUBTYPE },
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{ .compatible = "qcom,pmi8998", .data = (void *)PMI8998_SUBTYPE },
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+ { .compatible = "qcom,pmk8002", .data = (void *)PMK8002_SUBTYPE },
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+ { .compatible = "qcom,smb2351", .data = (void *)SMB2351_SUBTYPE },
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{ .compatible = "qcom,spmi-pmic", .data = (void *)COMMON_SUBTYPE },
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{ }
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};
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