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62b7f5931c
bcm2708: boot tested on RPi B+ v1.2
bcm2709: boot tested on RPi 3B v1.2 and RPi 4B v1.1 4G
bcm2710: boot tested on RPi 3B v1.2
bcm2711: boot tested on RPi 4B v1.1 4G
Signed-off-by: Álvaro Fernández Rojas <noltari@gmail.com>
(cherry-picked from commit f07e572f64)
135 lines
4.2 KiB
Diff
135 lines
4.2 KiB
Diff
From 1a8e3d8e883b9f9b18dff052a9294d4354994992 Mon Sep 17 00:00:00 2001
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From: Dave Stevenson <dave.stevenson@raspberrypi.org>
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Date: Thu, 30 May 2019 13:56:15 +0100
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Subject: [PATCH] drm/vc4: fkms to query the VPU for HDMI clock limits
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The VPU has configured clocks for 4k (or not) via config.txt,
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and will limit the choice of video modes based on that.
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Make fkms query it for these limits too to avoid selecting modes
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that can not be handled by the current clock setup.
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Signed-off-by: Dave Stevenson <dave.stevenson@raspberrypi.org>
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---
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drivers/gpu/drm/vc4/vc4_drv.h | 1 +
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drivers/gpu/drm/vc4/vc4_firmware_kms.c | 48 ++++++++++++++++++++++
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include/soc/bcm2835/raspberrypi-firmware.h | 1 +
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3 files changed, 50 insertions(+)
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--- a/drivers/gpu/drm/vc4/vc4_drv.h
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+++ b/drivers/gpu/drm/vc4/vc4_drv.h
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@@ -81,6 +81,7 @@ struct vc4_dev {
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struct vc4_dsi *dsi1;
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struct vc4_vec *vec;
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struct vc4_txp *txp;
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+ struct vc4_fkms *fkms;
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struct vc4_hang_state *hang_state;
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--- a/drivers/gpu/drm/vc4/vc4_firmware_kms.c
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+++ b/drivers/gpu/drm/vc4/vc4_firmware_kms.c
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@@ -32,6 +32,14 @@
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#include "vc_image_types.h"
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#include <soc/bcm2835/raspberrypi-firmware.h>
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+struct get_display_cfg {
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+ u32 max_pixel_clock[2]; //Max pixel clock for each display
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+};
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+
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+struct vc4_fkms {
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+ struct get_display_cfg cfg;
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+};
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+
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#define PLANES_PER_CRTC 3
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struct set_plane {
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@@ -795,6 +803,11 @@ static void vc4_crtc_enable(struct drm_c
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static enum drm_mode_status
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vc4_crtc_mode_valid(struct drm_crtc *crtc, const struct drm_display_mode *mode)
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{
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+ struct vc4_crtc *vc4_crtc = to_vc4_crtc(crtc);
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+ struct drm_device *dev = crtc->dev;
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+ struct vc4_dev *vc4 = to_vc4_dev(dev);
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+ struct vc4_fkms *fkms = vc4->fkms;
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+
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/* Do not allow doublescan modes from user space */
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if (mode->flags & DRM_MODE_FLAG_DBLSCAN) {
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DRM_DEBUG_KMS("[CRTC:%d] Doublescan mode rejected.\n",
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@@ -802,6 +815,22 @@ vc4_crtc_mode_valid(struct drm_crtc *crt
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return MODE_NO_DBLESCAN;
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}
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+ /* Limit the pixel clock based on the HDMI clock limits from the
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+ * firmware
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+ */
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+ switch (vc4_crtc->display_number) {
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+ case 2: /* HDMI0 */
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+ if (fkms->cfg.max_pixel_clock[0] &&
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+ mode->clock > fkms->cfg.max_pixel_clock[0])
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+ return MODE_CLOCK_HIGH;
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+ break;
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+ case 7: /* HDMI1 */
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+ if (fkms->cfg.max_pixel_clock[1] &&
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+ mode->clock > fkms->cfg.max_pixel_clock[1])
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+ return MODE_CLOCK_HIGH;
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+ break;
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+ }
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+
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/* Limit the pixel clock until we can get dynamic HDMI 2.0 scrambling
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* working.
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*/
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@@ -1295,11 +1324,16 @@ static int vc4_fkms_bind(struct device *
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struct device_node *firmware_node;
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struct vc4_crtc **crtc_list;
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u32 num_displays, display_num;
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+ struct vc4_fkms *fkms;
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int ret;
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u32 display_id;
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vc4->firmware_kms = true;
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+ fkms = devm_kzalloc(dev, sizeof(*fkms), GFP_KERNEL);
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+ if (!fkms)
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+ return -ENOMEM;
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+
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/* firmware kms doesn't have precise a scanoutpos implementation, so
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* we can't do the precise vblank timestamp mode.
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*/
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@@ -1328,6 +1362,18 @@ static int vc4_fkms_bind(struct device *
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ret = 0;
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}
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+ ret = rpi_firmware_property(vc4->firmware,
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+ RPI_FIRMWARE_GET_DISPLAY_CFG,
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+ &fkms->cfg, sizeof(fkms->cfg));
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+
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+ if (ret)
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+ return -EINVAL;
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+ /* The firmware works in Hz. This will be compared against kHz, so div
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+ * 1000 now rather than multiple times later.
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+ */
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+ fkms->cfg.max_pixel_clock[0] /= 1000;
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+ fkms->cfg.max_pixel_clock[1] /= 1000;
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+
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/* Allocate a list, with space for a NULL on the end */
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crtc_list = devm_kzalloc(dev, sizeof(crtc_list) * (num_displays + 1),
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GFP_KERNEL);
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@@ -1369,6 +1415,8 @@ static int vc4_fkms_bind(struct device *
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DRM_WARN("No displays found. Consider forcing hotplug if HDMI is attached\n");
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}
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+ vc4->fkms = fkms;
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+
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platform_set_drvdata(pdev, crtc_list);
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return 0;
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--- a/include/soc/bcm2835/raspberrypi-firmware.h
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+++ b/include/soc/bcm2835/raspberrypi-firmware.h
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@@ -152,6 +152,7 @@ enum rpi_firmware_property_tag {
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RPI_FIRMWARE_SET_PLANE = 0x00048015,
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RPI_FIRMWARE_GET_DISPLAY_TIMING = 0x00040017,
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RPI_FIRMWARE_SET_TIMING = 0x00048017,
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+ RPI_FIRMWARE_GET_DISPLAY_CFG = 0x00040018,
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RPI_FIRMWARE_GET_COMMAND_LINE = 0x00050001,
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RPI_FIRMWARE_GET_DMA_CHANNELS = 0x00060001,
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