openwrt/target/linux/ath79/dts/ar9330_glinet_ar150.dts
Mathias Kresin 0ff5785c5d ath79: fix dts files
Add the SoC compatible to the individual dts files. Rename the dts files
to match the common pattern.

Remove dts files wich aren't used and no image in ar71xx exists.

Signed-off-by: Mathias Kresin <dev@kresin.me>
2018-05-17 07:40:19 +02:00

163 lines
2.3 KiB
Plaintext

// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
/dts-v1/;
#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/input/input.h>
#include "ar9330.dtsi"
/ {
model = "GL.iNet GL-AR150";
compatible = "glinet,ar150", "qca,ar9330";
aliases {
serial0 = &uart;
};
memory@0 {
device_type = "memory";
reg = <0x0 0x4000000>;
};
leds {
compatible = "gpio-leds";
wlan {
label = "gl-ar150:orange:wlan";
gpios = <&gpio 0 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
lan {
label = "gl-ar150:green:lan";
gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
wan {
label = "gl-ar150:green:wan";
gpios = <&gpio 15 GPIO_ACTIVE_HIGH>;
default-state = "off";
};
};
keys {
compatible = "gpio-keys-polled";
#address-cells = <1>;
#size-cells = <0>;
poll-interval = <100>;
manual {
label = "manual";
linux,code = <BTN_7>;
gpios = <&gpio 7 GPIO_ACTIVE_HIGH>;
};
auto {
label = "auto";
linux,code = <BTN_8>;
gpios = <&gpio 8 GPIO_ACTIVE_HIGH>;
};
reset {
label = "reset";
linux,code = <KEY_RESTART>;
gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
};
};
};
&uart {
status = "okay";
};
&gpio {
status = "okay";
};
&usb {
dr_mode = "host";
status = "okay";
};
&usb_phy {
status = "okay";
gpios = <&gpio 6 GPIO_ACTIVE_HIGH>;
};
&spi {
num-chipselects = <1>;
status = "okay";
spiflash {
#address-cells = <1>;
#size-cells = <1>;
compatible = "jedec,spi-nor";
spi-max-frequency = <104000000>;
reg = <0>;
partitions {
compatible = "fixed-partitions";
#address-cells = <1>;
#size-cells = <1>;
partition@0 {
label = "u-boot";
reg = <0x000000 0x040000>;
read-only;
};
partition@1 {
label = "u-boot-env";
reg = <0x040000 0x010000>;
};
partition@2 {
label = "firmware";
reg = <0x050000 0xfa0000>;
};
art: partition@3 {
label = "ART";
reg = <0xff0000 0x010000>;
read-only;
};
};
};
};
&mdio0 {
status = "okay";
phy4: ethernet-phy@4 {
reg = <4>;
phy-mode = "mii";
};
};
&eth0 {
status = "okay";
mtd-mac-address = <&art 0x0>;
phy-handle = <&phy4>;
};
&eth1 {
status = "okay";
mtd-mac-address = <&art 0x0>;
fixed-link {
speed = <1000>;
full-duplex;
};
gmac-config {
device = <&gmac>;
switch-phy-addr-swap = <0>;
switch-phy-swap = <0>;
};
};