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6bf179b270
Switch to the mainline Lantiq PCIe PHY driver and update the vr9.dtsi
accordingly.
The Lantiq IRQ SMP support added upstream required changes to the SoC
dtsi as well.
Following changes are made to the Lantiq kernel patches:
0005-lantiq_etop-pass-struct-device-to-DMA-API-functions.patch
0006-MIPS-lantiq-pass-struct-device-to-DMA-API-functions.patch
applied upstream
0008-MIPS-lantiq-backport-old-timer-code.patch
access_ok API update because it lost it's type (which was the first)
parameter in upstream commit 96d4f267e40f95 ("Remove 'type' argument
from access_ok() function")
0024-MIPS-lantiq-autoselect-soc-rev-matching-fw.patch
merged into 0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch
0024-MIPS-lantiq-revert-DSA-switch-driver-PMU-clock-chang.patch
revert upstream changes required for upstream xrx200 ethernet and
xrx200 (DSA) switch driver but breaking our driver
0026-MIPS-lantiq-Add-GPHY-Firmware-loader.patch
required for our driver but dropped upstream, add former upstream
version
0028-NET-lantiq-various-etop-fixes.patch
now has to use the phy_set_max_speed API instead of modifying
phydev->supported. Also call ltq_dma_enable_irq() in
ltq_etop_open() based on upstream commit cc973aecf0b054 ("MIPS:
lantiq: Do not enable IRQs in dma open")
Signed-off-by: Mathias Kresin <dev@kresin.me>
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
79 lines
2.9 KiB
Diff
79 lines
2.9 KiB
Diff
From de2cad82c4d0872066f83ce59462603852b47f03 Mon Sep 17 00:00:00 2001
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From: Hauke Mehrtens <hauke@hauke-m.de>
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Date: Fri, 6 Jan 2017 17:55:24 +0100
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Subject: [PATCH 2/2] usb: dwc2: add support for other Lantiq SoCs
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The size of the internal RAM of the DesignWare USB controller changed
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between the different Lantiq SoCs. We have the following sizes:
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Amazon + Danube: 8 KByte
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Amazon SE + arx100: 2 KByte
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xrx200 + xrx300: 2.5 KByte
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For Danube SoC we do not provide the params and let the driver decide
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to use sane defaults, for the Amazon SE and arx100 we use small fifos
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and for the xrx200 and xrx300 SCs a little bit bigger periodic fifo.
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The auto detection of max_transfer_size and max_packet_count should
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work, so remove it.
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Signed-off-by: Hauke Mehrtens <hauke@hauke-m.de>
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---
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drivers/usb/dwc2/platform.c | 46 ++++++++++++++++++++++++++++++++++++++-------
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1 file changed, 39 insertions(+), 7 deletions(-)
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--- a/drivers/usb/dwc2/params.c
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+++ b/drivers/usb/dwc2/params.c
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@@ -92,7 +92,14 @@ static void dwc2_set_rk_params(struct dw
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p->power_down = 0;
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}
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-static void dwc2_set_ltq_params(struct dwc2_hsotg *hsotg)
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+static void dwc2_set_ltq_danube_params(struct dwc2_hsotg *hsotg)
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+{
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+ struct dwc2_core_params *p = &hsotg->params;
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+
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+ p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
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+}
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+
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+static void dwc2_set_ltq_ase_params(struct dwc2_hsotg *hsotg)
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{
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struct dwc2_core_params *p = &hsotg->params;
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@@ -100,12 +107,20 @@ static void dwc2_set_ltq_params(struct d
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p->host_rx_fifo_size = 288;
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p->host_nperio_tx_fifo_size = 128;
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p->host_perio_tx_fifo_size = 96;
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- p->max_transfer_size = 65535;
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- p->max_packet_count = 511;
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p->ahbcfg = GAHBCFG_HBSTLEN_INCR16 <<
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GAHBCFG_HBSTLEN_SHIFT;
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}
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+static void dwc2_set_ltq_xrx200_params(struct dwc2_hsotg *hsotg)
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+{
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+ struct dwc2_core_params *p = &hsotg->params;
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+
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+ p->otg_cap = DWC2_CAP_PARAM_NO_HNP_SRP_CAPABLE;
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+ p->host_rx_fifo_size = 288;
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+ p->host_nperio_tx_fifo_size = 128;
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+ p->host_perio_tx_fifo_size = 136;
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+}
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+
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static void dwc2_set_amlogic_params(struct dwc2_hsotg *hsotg)
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{
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struct dwc2_core_params *p = &hsotg->params;
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@@ -167,8 +182,11 @@ const struct of_device_id dwc2_of_match_
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{ .compatible = "brcm,bcm2835-usb", .data = dwc2_set_bcm_params },
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{ .compatible = "hisilicon,hi6220-usb", .data = dwc2_set_his_params },
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{ .compatible = "rockchip,rk3066-usb", .data = dwc2_set_rk_params },
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- { .compatible = "lantiq,arx100-usb", .data = dwc2_set_ltq_params },
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- { .compatible = "lantiq,xrx200-usb", .data = dwc2_set_ltq_params },
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+ { .compatible = "lantiq,danube-usb", .data = &dwc2_set_ltq_danube_params },
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+ { .compatible = "lantiq,ase-usb", .data = &dwc2_set_ltq_ase_params },
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+ { .compatible = "lantiq,arx100-usb", .data = &dwc2_set_ltq_ase_params },
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+ { .compatible = "lantiq,xrx200-usb", .data = &dwc2_set_ltq_xrx200_params },
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+ { .compatible = "lantiq,xrx300-usb", .data = &dwc2_set_ltq_xrx200_params },
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{ .compatible = "snps,dwc2" },
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{ .compatible = "samsung,s3c6400-hsotg",
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.data = dwc2_set_s3c6400_params },
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