mirror of
https://github.com/openwrt/openwrt.git
synced 2024-12-25 00:11:13 +00:00
6d6985ff0e
SoC: AR9344 RAM: 128MB Flash: 16MiB Winbond 25Q128BVFG SPI NOR 5GHz WiFi: AR9380 PCIe 3x3:3 802.11n 2.4GHz WiFi: AR9344 (SoC) AHB 2x2:2 802.11n 5x Gigabit ethernet via AR8327N switch (green + amber LEDs) 2x USB 2.0 via GL850G hub 4x front LEDs from SoC GPIO 1x front WPS button from SoC GPIO 1x bottom reset button from SoC GPIO Known issues: AR8327N LEDs only have default functionality, not presented in sysfs. This is a regression from ar71xx. UART header JP1, 115200 no parity 1 stop TX GND VCC (N/P) RX See https://openwrt.org/toh/wd/n750 for flashing detail. Procedures unchanged from ar71xx. Tested sysupgrade + factory flash from WD Emergency Recovery Signed-off-by: Ryan Mounce <ryan@mounce.com.au>
217 lines
3.2 KiB
Plaintext
217 lines
3.2 KiB
Plaintext
// SPDX-License-Identifier: GPL-2.0-or-later OR MIT
|
|
/dts-v1/;
|
|
|
|
#include <dt-bindings/gpio/gpio.h>
|
|
#include <dt-bindings/input/input.h>
|
|
|
|
#include "ar9344.dtsi"
|
|
|
|
/ {
|
|
model = "Western Digital My Net N750";
|
|
compatible = "wd,mynet-n750", "qca,ar9344";
|
|
|
|
chosen {
|
|
bootargs = "console=ttyS0,115200n8";
|
|
};
|
|
|
|
aliases {
|
|
led-boot = &power;
|
|
led-failsafe = &power;
|
|
led-running = &power;
|
|
led-upgrade = &power;
|
|
};
|
|
|
|
leds {
|
|
compatible = "gpio-leds";
|
|
|
|
wifi {
|
|
label = "mynet-n750:blue:wireless";
|
|
gpios = <&gpio 11 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
internet {
|
|
label = "mynet-n750:blue:internet";
|
|
gpios = <&gpio 12 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
wps {
|
|
label = "mynet-n750:blue:wps";
|
|
gpios = <&gpio 13 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
|
|
power: power {
|
|
label = "mynet-n750:blue:power";
|
|
gpios = <&gpio 14 GPIO_ACTIVE_HIGH>;
|
|
};
|
|
};
|
|
|
|
keys {
|
|
compatible = "gpio-keys";
|
|
|
|
reset {
|
|
linux,code = <KEY_RESTART>;
|
|
gpios = <&gpio 17 GPIO_ACTIVE_LOW>;
|
|
};
|
|
|
|
wps {
|
|
linux,code = <KEY_WPS_BUTTON>;
|
|
gpios = <&gpio 19 GPIO_ACTIVE_LOW>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&ref {
|
|
clock-frequency = <40000000>;
|
|
};
|
|
|
|
&uart {
|
|
status = "okay";
|
|
};
|
|
|
|
&gpio {
|
|
status = "okay";
|
|
|
|
gpio_ext_lna0 {
|
|
gpio-hog;
|
|
gpios = <15 0>;
|
|
output-high;
|
|
line-name = "mynet-n750:ext:lna0";
|
|
};
|
|
|
|
gpio_ext_lna1 {
|
|
gpio-hog;
|
|
gpios = <18 0>;
|
|
output-high;
|
|
line-name = "mynet-n750:ext:lna1";
|
|
};
|
|
};
|
|
|
|
&spi {
|
|
num-cs = <1>;
|
|
|
|
status = "okay";
|
|
|
|
flash@0 {
|
|
compatible = "jedec,spi-nor";
|
|
reg = <0>;
|
|
spi-max-frequency = <25000000>;
|
|
|
|
partitions {
|
|
compatible = "fixed-partitions";
|
|
#address-cells = <1>;
|
|
#size-cells = <1>;
|
|
|
|
partition@0 {
|
|
label = "bootloader";
|
|
reg = <0x000000 0x40000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@40000 {
|
|
label = "bdcfg";
|
|
reg = <0x040000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@50000 {
|
|
label = "devdata";
|
|
reg = <0x050000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@60000 {
|
|
label = "devconf";
|
|
reg = <0x060000 0x10000>;
|
|
read-only;
|
|
};
|
|
|
|
partition@70000 {
|
|
compatible = "seama";
|
|
label = "firmware";
|
|
reg = <0x070000 0xf80000>;
|
|
};
|
|
|
|
art: partition@ff0000 {
|
|
label = "art";
|
|
reg = <0xff0000 0x010000>;
|
|
read-only;
|
|
};
|
|
};
|
|
};
|
|
};
|
|
|
|
&usb {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
status = "okay";
|
|
|
|
port@1 {
|
|
#address-cells = <1>;
|
|
#size-cells = <0>;
|
|
reg = <1>;
|
|
#trigger-source-cells = <0>;
|
|
|
|
hub_port1: port@1 {
|
|
reg = <1>;
|
|
#trigger-source-cells = <0>;
|
|
};
|
|
|
|
hub_port2: port@2 {
|
|
reg = <2>;
|
|
#trigger-source-cells = <0>;
|
|
};
|
|
};
|
|
};
|
|
|
|
&usb_phy {
|
|
status = "okay";
|
|
};
|
|
|
|
&pcie {
|
|
status = "okay";
|
|
|
|
wifi@0,0 {
|
|
compatible = "pci168c,0033";
|
|
reg = <0x0000 0 0 0 0>;
|
|
qca,no-eeprom;
|
|
};
|
|
};
|
|
|
|
&wmac {
|
|
status = "okay";
|
|
qca,no-eeprom;
|
|
};
|
|
|
|
&mdio0 {
|
|
status = "okay";
|
|
phy-mask = <0>;
|
|
|
|
switch0@1f {
|
|
compatible = "qca,ar8327";
|
|
reg = <0x1f>;
|
|
|
|
qca,ar8327-initvals = <
|
|
0x04 0x07600000 /* PORT0 PAD MODE CTRL */
|
|
0x10 0x80000080 /* POWER_ON_STRIP */
|
|
0x50 0xc737c737 /* LED_CTRL0 */
|
|
0x54 0x00000000 /* LED_CTRL1 */
|
|
0x58 0x00000000 /* LED_CTRL2 */
|
|
0x5c 0x0030c300 /* LED_CTRL3 */
|
|
0x7c 0x0000007e /* PORT0_STATUS */
|
|
>;
|
|
};
|
|
};
|
|
|
|
ð0 {
|
|
status = "okay";
|
|
|
|
/* default for ar934x, except for 1000M */
|
|
pll-data = <0x06000000 0x00000101 0x00001616>;
|
|
|
|
phy-mode = "rgmii";
|
|
fixed-link {
|
|
speed = <1000>;
|
|
full-duplex;
|
|
};
|
|
};
|