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ee6ba216d8
Fix FDB learning bugs when VLAN filtering is enabled. Signed-off-by: DENG Qingfang <dqfext@gmail.com> Tested-by: Arınç ÜNAL <arinc.unal@arinc9.com> Tested-by: Stijn Tintel <stijn@linux-ipv6.be>
66 lines
2.0 KiB
Diff
66 lines
2.0 KiB
Diff
From ba2203f36b981235556504fb7b62baee28512a40 Mon Sep 17 00:00:00 2001
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From: DENG Qingfang <dqfext@gmail.com>
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Date: Tue, 24 Aug 2021 11:37:50 +0800
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Subject: [PATCH] net: dsa: mt7530: disable learning on standalone ports
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This is a partial backport of commit 5a30833b9a16f8d1aa15de06636f9317ca51f9df
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("net: dsa: mt7530: support MDB and bridge flag operations") upstream.
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Make sure that the standalone ports start up with learning disabled.
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Signed-off-by: DENG Qingfang <dqfext@gmail.com>
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---
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drivers/net/dsa/mt7530.c | 16 ++++++++++++++--
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1 file changed, 14 insertions(+), 2 deletions(-)
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--- a/drivers/net/dsa/mt7530.c
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+++ b/drivers/net/dsa/mt7530.c
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@@ -1163,6 +1163,8 @@ mt7530_port_bridge_join(struct dsa_switc
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PCR_MATRIX_MASK, PCR_MATRIX(port_bitmap));
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priv->ports[port].pm |= PCR_MATRIX(port_bitmap);
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+ mt7530_clear(priv, MT7530_PSC_P(port), SA_DIS);
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+
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mutex_unlock(&priv->reg_mutex);
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return 0;
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@@ -1260,6 +1262,8 @@ mt7530_port_bridge_leave(struct dsa_swit
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PCR_MATRIX(BIT(MT7530_CPU_PORT)));
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priv->ports[port].pm = PCR_MATRIX(BIT(MT7530_CPU_PORT));
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+ mt7530_set(priv, MT7530_PSC_P(port), SA_DIS);
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+
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mutex_unlock(&priv->reg_mutex);
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}
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@@ -1817,9 +1821,13 @@ mt7530_setup(struct dsa_switch *ds)
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ret = mt753x_cpu_port_enable(ds, i);
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if (ret)
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return ret;
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- } else
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+ } else {
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mt7530_port_disable(ds, i);
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+ /* Disable learning by default on all user ports */
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+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);
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+ }
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+
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/* Enable consistent egress tag */
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mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
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PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
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@@ -1979,9 +1987,13 @@ mt7531_setup(struct dsa_switch *ds)
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ret = mt753x_cpu_port_enable(ds, i);
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if (ret)
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return ret;
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- } else
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+ } else {
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mt7530_port_disable(ds, i);
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+ /* Disable learning by default on all user ports */
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+ mt7530_set(priv, MT7530_PSC_P(i), SA_DIS);
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+ }
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+
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/* Enable consistent egress tag */
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mt7530_rmw(priv, MT7530_PVC_P(i), PVC_EG_TAG_MASK,
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PVC_EG_TAG(MT7530_VLAN_EG_CONSISTENT));
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