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05ed7dc50d
Patches automatically rebased. Signed-off-by: Rui Salvaterra <rsalvaterra@gmail.com>
80 lines
2.0 KiB
Diff
80 lines
2.0 KiB
Diff
From b2073cc043612bf95b115bd94103cfb2936f05bf Mon Sep 17 00:00:00 2001
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From: Claudiu Beznea <claudiu.beznea@microchip.com>
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Date: Thu, 15 Apr 2021 13:50:00 +0300
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Subject: [PATCH 210/247] ARM: at91: pm: add support for 2.5V LDO regulator
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control
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Add support to disable/enable 2.5V LDO regulator when entering/exiting
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any ULP mode.
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Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
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Signed-off-by: Nicolas Ferre <nicolas.ferre@microchip.com>
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Link: https://lore.kernel.org/r/20210415105010.569620-15-claudiu.beznea@microchip.com
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---
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arch/arm/mach-at91/pm.h | 1 +
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arch/arm/mach-at91/pm_suspend.S | 29 +++++++++++++++++++++++++++++
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2 files changed, 30 insertions(+)
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--- a/arch/arm/mach-at91/pm.h
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+++ b/arch/arm/mach-at91/pm.h
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@@ -13,6 +13,7 @@
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#include <soc/at91/at91sam9_ddrsdr.h>
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#include <soc/at91/at91sam9_sdramc.h>
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#include <soc/at91/sama7-ddr.h>
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+#include <soc/at91/sama7-sfrbu.h>
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#define AT91_MEMCTRL_MC 0
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#define AT91_MEMCTRL_SDRAMC 1
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--- a/arch/arm/mach-at91/pm_suspend.S
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+++ b/arch/arm/mach-at91/pm_suspend.S
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@@ -83,6 +83,29 @@ tmp3 .req r6
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.endm
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+/**
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+ * Set state for 2.5V low power regulator
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+ * @ena: 0 - disable regulator
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+ * 1 - enable regulator
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+ *
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+ * Side effects: overwrites r7, r8, r9, r10
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+ */
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+ .macro at91_2_5V_reg_set_low_power ena
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+#ifdef CONFIG_SOC_SAMA7
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+ ldr r7, .sfrbu
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+ mov r8, #\ena
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+ ldr r9, [r7, #AT91_SFRBU_25LDOCR]
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+ orr r9, r9, #AT91_SFRBU_25LDOCR_LP
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+ cmp r8, #1
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+ beq lp_done_\ena
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+ bic r9, r9, #AT91_SFRBU_25LDOCR_LP
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+lp_done_\ena:
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+ ldr r10, =AT91_SFRBU_25LDOCR_LDOANAKEY
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+ orr r9, r9, r10
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+ str r9, [r7, #AT91_SFRBU_25LDOCR]
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+#endif
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+ .endm
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+
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.text
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.arm
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@@ -906,6 +929,9 @@ save_mck:
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at91_plla_disable
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+ /* Enable low power mode for 2.5V regulator. */
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+ at91_2_5V_reg_set_low_power 1
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+
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ldr tmp3, .pm_mode
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cmp tmp3, #AT91_PM_ULP1
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beq ulp1_mode
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@@ -918,6 +944,9 @@ ulp1_mode:
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b ulp_exit
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ulp_exit:
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+ /* Disable low power mode for 2.5V regulator. */
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+ at91_2_5V_reg_set_low_power 0
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+
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ldr pmc, .pmc_base
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at91_plla_enable
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