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61 lines
2.3 KiB
Diff
61 lines
2.3 KiB
Diff
From c42305f52560a1be6fc25a2f23579c7b323de654 Mon Sep 17 00:00:00 2001
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From: Eugen Hristev <eugen.hristev@microchip.com>
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Date: Tue, 13 Apr 2021 12:57:03 +0200
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Subject: [PATCH 161/247] media: atmel: atmel-isc: specialize dma cfg
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The dma configuration (DCFG) is specific to the product.
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Move this configuration in the product specific driver, and add the
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field inside the driver struct.
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Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
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Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl>
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Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
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---
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drivers/media/platform/atmel/atmel-isc-base.c | 3 +--
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drivers/media/platform/atmel/atmel-isc.h | 2 ++
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drivers/media/platform/atmel/atmel-sama5d2-isc.c | 3 +++
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3 files changed, 6 insertions(+), 2 deletions(-)
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--- a/drivers/media/platform/atmel/atmel-isc-base.c
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+++ b/drivers/media/platform/atmel/atmel-isc-base.c
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@@ -724,8 +724,7 @@ static int isc_configure(struct isc_devi
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rlp_mode = isc->config.rlp_cfg_mode;
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pipeline = isc->config.bits_pipeline;
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- dcfg = isc->config.dcfg_imode |
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- ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
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+ dcfg = isc->config.dcfg_imode | isc->dcfg;
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pfe_cfg0 |= subdev->pfe_cfg0 | ISC_PFE_CFG0_MODE_PROGRESSIVE;
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mask = ISC_PFE_CFG0_BPS_MASK | ISC_PFE_CFG0_HPOL_LOW |
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--- a/drivers/media/platform/atmel/atmel-isc.h
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+++ b/drivers/media/platform/atmel/atmel-isc.h
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@@ -149,6 +149,7 @@ struct isc_ctrls {
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* @hclock: Hclock clock input (refer datasheet)
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* @ispck: iscpck clock (refer datasheet)
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* @isc_clks: ISC clocks
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+ * @dcfg: DMA master configuration, architecture dependent
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*
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* @dev: Registered device driver
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* @v4l2_dev: v4l2 registered device
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@@ -196,6 +197,7 @@ struct isc_device {
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struct clk *hclock;
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struct clk *ispck;
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struct isc_clk isc_clks[2];
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+ u32 dcfg;
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struct device *dev;
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struct v4l2_device v4l2_dev;
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--- a/drivers/media/platform/atmel/atmel-sama5d2-isc.c
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+++ b/drivers/media/platform/atmel/atmel-sama5d2-isc.c
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@@ -219,6 +219,9 @@ static int atmel_isc_probe(struct platfo
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isc->max_width = ISC_SAMA5D2_MAX_SUPPORT_WIDTH;
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isc->max_height = ISC_SAMA5D2_MAX_SUPPORT_HEIGHT;
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+ /* sama5d2-isc - 8 bits per beat */
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+ isc->dcfg = ISC_DCFG_YMBSIZE_BEATS8 | ISC_DCFG_CMBSIZE_BEATS8;
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+
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ret = isc_pipeline_init(isc);
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if (ret)
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return ret;
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